i.MX8M Mini GPIOs and Power-up sequence

[nija_mankodi]

Hi NXP team,

W are using i>MX8M Mini Quad core processor in our emergency calling Device product. This product will be used as VoIP to help elderly people and kids at home during emergency situations. We need below data to freeze on the schematic part for i.MX8M Mini Quad core.

1) What is the MTBF (Mean time between failures) value for processor MIMX8MM6DVTLZAA?

2) Which document specifies interrupt capable GPIO and PWM capable GPIO for this processor?

3) As per its EVK, once we give 5V to PMIC (BD71847MWV), all its supplies are generated. Processor entire power up sequence is executed by PMIC (based on I2C programming) and no external regulator is required. All the supplies for processor to come out of reset and boot is provided by this PMIC itself. NO external regulators required. Please confirm.

Please provide update on this ASAP.

[igorpadykov]

Hi Nija

1. one can refer to AN12468 i.MX8MMINI Product Lifetime Usage

https://www.controleng.com/articles/learn-or-review-the-difference-between-mtbf-and-lifetime/ 

2. i.MX 8M Mini Applications Processor Reference Manual

3. yes, your understanding is correct

Best regards
igor
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[nija_mankodi]

Thanks for your prompt response. Please help to resolve below queries as well.

1) Can we use boot config pins after booting as SAI or GPIO interface? Is there any recommendation or design guideline on how this is to be taken care for these mux functionalities of boot config pins?

2) We are assigning GPIO and low speed peripherals as per attached sheet in pin mux tool. However, we are getting warning in tool . Please explain this and let us know if we have not assigned any power domain/GPIO correctly. We assume that whatever voltage we feed to particular power group, its GPIO will also operate at same voltage. If yes, we have allocated GPIO accordingly only. Please explain this warning.

[igorpadykov]

Hi Nija

for new questions please create new thread

Best regards
igor