Hi
we are facing an issue using MIPI-DSI interface from i.MX8MQ.
On our board a Full-HD LVDS display panel is connected to MIPI-DSI interface through a "MIPI-DSI to LVDS" bridge.
Most Full-HD displays work well in this setup, but in this project it is mandatory for us to use one Full-HD display panel that does not works correctly .... It is not possible to use another panel cause mechanical constraints.
We discovered that the root cause for the missing synchronism on display was an unstable horizontal timelane length produced by MIPI_DSI from i.MX8M !!
In the following pictures I'm going to show the issue: first we transform LVDS digital signal in RGB signal, and acquire them with scope;
YELLOW LINE = DATA ENABLE
GREEN LINE = CLOCK
In this image you can see a not stable DE period ! In some acquisitions, it lasts 14.692 uSec in other acquisitions 14.705 uSec. (N.B. It does not assume other values except those)
Further investigations showed that DE active period is always constant, but the blank part of horizontal timeline sometimes misses a clock cycle (Fig below). For this reason other Full-HD panels could work ...
Finally, we found the root cause of the issue: MIPI-DSI controller of i.MX8M does not produce HSS packets with a constant period !!!!
To deeply analyze the ISSUE, we inspected MIPI-DSI LINE1 (differential signals). We plot a totally blank image on the screen to obtain a more clear mipi-dsi packets view.
Results are shown below:
We realize that the MIPI-DSI controller spent a non-constant time at the end of every HORIZONTAL TIMELINE, before starting with the new transmission
What does the controller in this phase? Can we regularize it?
After a long session of tests we understand that this (variable) duration of that period is influenced by clock frequencies and horizontal timeline length. But we cannot find how to manage it, nor searching in i.MX8M Reference Manual, nor with reversing engineer.
Can someone help us? We need to realize a working environment for this display for a very important project.
Here is an explicative picture of DSI signal with a real image on the screen:
BLUE = Data Enable
GREEN = DSI LINE1
YELLOW = DSI Clock
Regards
Giuseppe
