Hello,
I have a basic question regarding the current source and sink capability of i.MX8M Quad processor.
What I understand from the datasheet & reference manual is we can configure some parameters for pad by writing to pad CTL register for I/O pins (IOMUXC_SW_PAD_CTL_PAD_GPIO1_IO09 as example).
Now the drive strength (current source & sink capability) of GPIO pin is based on the value configured for DSE field of the register as shown in below picture:
So from this,
Q1: If DSE is 001 and VDD is 3.3V then the current I can source or sink through that pin would be equal to 3.3V/255Ohm = 12.9mA ? or is there more to it that needs to be considered?
Q2: Can this DSE be explained as a series resistor between the driver and the load that will be connected to the I/O pin? So in actual this resistor is acting as a current limiter?
link to the processor:
Thank you
Hello,
Q1: Yes, that is correct, and it is the only thing you need to consider. You can use this thread as reference.
Q2: We don't have an exact representation of the pre-driver structure but should be something like this:
But yes, something like that. The "series resistor" you mentioned is certain by the transistor array output impedance of the pre-driver.
Best regards.
Thank you.
So just to be clear, does this means that even if I connect 3.3V supply directly to I/O pin and set the pin as output and drive it as low (or vice versa i.e. connect GND to I/O pin and drive it high), the amount of current that will flow will limit by this series resistance / output impedance and will not be a short circuit?