i.MX8M DDR Init Bank Size U-Boot 2020.04

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i.MX8M DDR Init Bank Size U-Boot 2020.04

Contributor II



I am working with a board that has an imx8mq with one bank of 4GB RAM. I am porting it to the latest released u-boot from NXP (starting with branch imx_v2020.04_5.4.24_2.1.0 pulled from code aurora imx), and ran into an issue with the number of banks I have and the size of the memory causing uboot to fail to boot.


The snippet of code below is part of the dram_init_banksize function in arch/arm/mach-imx/imx8m/soc.c (line # 235)


int dram_init_banksize(void)
    int bank = 0;
    int ret;
    phys_size_t sdram_size;
    ret = board_phys_sdram_size(&sdram_size);
    if (ret)
        return ret;
    gd->bd->bi_dram[bank].start = PHYS_SDRAM;
    if (rom_pointer[1]) {
        phys_addr_t optee_start = (phys_addr_t)rom_pointer[0];
        phys_size_t optee_size = (size_t)rom_pointer[1];

        gd->bd->bi_dram[bank].size = optee_start -gd->bd->bi_dram[bank].start;
        if ((optee_start + optee_size) < (PHYS_SDRAM + sdram_size)) {
            if ( ++bank >= CONFIG_NR_DRAM_BANKS) {
                puts("CONFIG_NR_DRAM_BANKS is not enough\n");
                return -1;
            gd->bd->bi_dram[bank].start = optee_start + optee_size;
            gd->bd->bi_dram[bank].size = PHYS_SDRAM +
                sdram_size - gd->bd->bi_dram[bank].start;
    } else {
        gd->bd->bi_dram[bank].size = sdram_size;
    if ( ++bank >= CONFIG_NR_DRAM_BANKS) {
        puts("CONFIG_NR_DRAM_BANKS is not enough for SDRAM_2\n");
        return -1;
    gd->bd->bi_dram[bank].start = PHYS_SDRAM_2;
    gd->bd->bi_dram[bank].size = PHYS_SDRAM_2_SIZE;
    return 0;




Based on the value of optee_start and optee_size, and the size of our memory, it seems to expect there to be more than one bank of ram.

When I configure it to have multiple banks of ram, I cannot access the second bank (memory past 0x100000000). I immediately get the following error:

u-boot=> mw.b 0x0000000100000000 1
"Error" handler, esr 0xbf000002
elr: 0000000040217118 lr : 00000000402176cc (reloc)
elr: 00000000fd73c118 lr : 00000000fd73c6cc
x0 : 0000000000000000 x1 : 0000000000000000
x2 : 0000000000000001 x3 : 0000000000000000
x4 : 00000000fc129dc1 x5 : 0000000000000001
x6 : 0000000000000000 x7 : 0000000000000008
x8 : 0000000000000010 x9 : 0000000000000008
x10: 0000000000000044 x11: 0000000000000010
x12: 0000000000000006 x13: 000000000001869f
x14: 0000000000000006 x15: 0000000000000021
x16: 00000000fd731cd4 x17: 0000000000000000
x18: 00000000fc124dc8 x19: 0000000000000000
x20: 0000000000000000 x21: 0000000000000000
x22: 00000000fc129a00 x23: 0000000000000000
x24: 0000000000000000 x25: 0000000000000000
x26: 0000000000000000 x27: 000000000000000b
x28: 00000000fc129950 x29: 00000000fc11c4e0

Code: 7100129f 1a9f17e1 7100001f 7a400820 (540000c0)
Resetting CPU ...


Any help patching uboot to gain access to the last gig of memory would be appreciated.


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3 Replies

NXP Employee
NXP Employee

After you change the PHY_SDRAM_SIZE, you use our DDR Stress Tools to finish LPDDR4 calibration,.The tool will automaticlly show which files need to be replaced

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NXP Employee
NXP Employee

Hi brendankrieger,


Did you use our DDR tools to test?

- Use RPA to generate a 4GB script
--Use ddr stress test tool to verify and generate timg.c
---Replace timg.c of imx8mq with timg.c

No manual modification is required, all are automatic.


Best Regards,



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Contributor II

I already followed those steps, but I can only access the lower 3 GB in  the first bank.

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