i.MX8 mini, M4: 8ch ADC input (TDMA) via SAI

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

i.MX8 mini, M4: 8ch ADC input (TDMA) via SAI

932 Views
niklasbergdahl
Contributor I

I want to receive data from an 8 ch ADC with one serial data input line (like SPI). Data is 24bits but stored as 32bits.

From input Fifo(s) the data will be transferred to DDR memory by SDMA.

I haven't figured out how to get data arranged in the Fifo(s) channel by channel so e.g. the DMA can copy data for one channel at the time. I only get interleaved data: ch1, ch2, ch3, ch4, ch5, ch6, ch7 when reading from RDR registers.


Is it possible to get data arranged in Fifos channel by channel?

 

SAI1 is setup as follow:

RCSR:

    FRDE = 1

    WSF = 1

    BCE = 1

    RE=1

 

RCR1:

    RFW = 0x40

 

RCR2:

    DIV=3

    BYP=1

    BCD=1

    BCP=1

    MSEL=1

 

RCR3:

    RCE=0xFF

 

RCR4:

    MF=1

    SYWD=1

    FRSZ=0x7

    FCOMB=0x2

    FCONT=1

 

RCR5:

    FBT=0x17

    W0W=0x17

    WNW=0x17

 

Not listed register parts are set to '0'.

   

 

Labels (1)
0 Kudos
4 Replies

911 Views
niklasbergdahl
Contributor I

Hi,

I'm using ADS1278 which I had available. I first run it in "discrete" mode and got 8 serial data streams, which SAI1 (only) could handle and then I got the AD-data in the 8 individual SAI1 Fifos. That was very convenient and the DMA script could read a number of words (8) for one channel and write them (burst) to a specific position in the DDR memory. I wrote the SDMA script myself because I couldn't get the ones from SDK to work for my needs.
For different reasons I couldn´t use SAI1 anymore and then I needed to get data from the ADC in one serial data stream (TDMA) and then the data will be interleaved in the SAI Fifos. This means a less efficient way of transferring data to DDR (by DMA) because
as I see it, the SDMA doesn't have an internal RAM to use for e.g. demultiplexing 8x8 32 bit words. Resulting in DMA need to send one word at the time to addresses (far apart) in the DDR .

So I thought that there might be some setting (that I missed) for the SAIs to demultiplex data directly by SAI when storing data to Fifos.

But, yes! if you have any idea/suggestion of how to design an efficient sdma-script for this purpose I will gladely welcome it!
I'm not very experienced in writing SDMA scripts so any tips/tricks is appreciated!

 

Br

Niklas

0 Kudos

896 Views
ceggers1
Contributor IV

Hi Niklas,

> as I see it, the SDMA doesn't have an internal RAM to use for e.g. demultiplexing 8x8 32 bit words.
in one project I use the SRAM of the SDMA for storing intermediate data. There are 8 kB SRAM at all, usually 4 kB is available for scripts and data. For the case we use the SRAM for demultiplexing data, DDR writes can be done in bursts.

regards
Christian

0 Kudos

887 Views
niklasbergdahl
Contributor I

Hi and thanks for the solution proposal! I didn't realize that I could use some portion of the script area for this.
I'll try to "reserve" at least 256 bytes (8 channels x 8 words (32bits) each) at e.g. address 0xFC0 (sdma 32 bits addressing) and demultiplex the data into that area

Br

Niklas.

0 Kudos

917 Views
ceggers1
Contributor IV

Hi Niklas,

if I understand you correctly, you have attached an external serial ADC via a SAI interface to the i.MX. Can you provide the ADC type you are using (I am just curious as may i.MX derivates misses an internal ADC...).

Do you already use the SDMA for transferring the data from the SAI to DDR memory? Which SDMA script do you use?

With a custom SDMA script, there should be no problem demultiplexing the incoming data before writing them to memory. If you like, I can help you creating such a script.

regards
Christian

0 Kudos