[i.MX8] Port Pin configuration and clock selection in periperhals vs SCFW

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[i.MX8] Port Pin configuration and clock selection in periperhals vs SCFW

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NXP Employee
NXP Employee

Dear,

As I understand that, Port pin configuration and clock settings in i.MX8 shall be done via SCFW. However in some peripherals, these peripherals can change clock selections and Port pin configuration via their own registers.

Could someone let me know if these registers impact to Port pin configuration and clock settings?

 

e.g, I configure Port pin of SCL/SDA of I2c to “PULL_UP” via SCFW but in I2c hardware, I change it to “Open Drain” via PINCFG field of LPI2C MCFGR1 register. What Port pin configuration shall be used? And vice versa?

 

e.g, I control CAN clock to 24M via SCFW but in CAN hardware, I change it to select OSC (40M) as its clock source via CLKSRC field of FlexCAN CTRL1 register. What clock shall be used, 24M or 40M? And vice versa?

Regards,

Luong

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NXP TechSupport
NXP TechSupport

Hi Luong

1. pad properties are defined by SCFW, not LPI2C MCFGR1 register.

2. SCFW controls peripheral clock of module. CLKSRC field of FlexCAN CTRL1 register

controls another clock: CAN Protocol Engine (PE), which is configured by dts property

"clk-src" described in linux documentation:

fsl-flexcan.txt\can\net\bindings\devicetree\Documentation - linux-imx - i.MX Linux kernel 


Best regards
igor
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