Hello,
I am having an issue with I2C3 SCL being stuck low during the first transfer each boot. I am using the i.MX8 MP EVK, with MCUXpresso SDK 2.15. I am trying to talk to an I2C device via the I2C3 peripheral using the M7 while the A53 is parked in u-boot.
Immediately after boot, the first transaction appears to clock out the address byte, which is acknowledged, and the sub-address data to the slave device as expected. However, the sub-address ACK clock pulse is NOT being generated. The ACK bit is not clocked when using either the I2C_MasterTransferNonBlocking() or the I2C_MasterTransferBlocking() commands, nor is a stop condition being generated.
Subsequent I2C transfers generate no clock pulses. When in this state, if I reconfigure the SCL pin to an open-drain output, I can toggle it, so I do not believe the slave is holding the clock line low.
See the example waveform below.

Why would the first byte have a NAK clocked out correctly, but not the second byte?