i.MX8 MM SPIDev clock issue

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i.MX8 MM SPIDev clock issue

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Contributor I

Hi,

We are working on a custom project where we need to configure the i.MX8MM SPIDev (ecspi2 spidev.c spi-imx.c) to 20MHz for a slave chip to work. We are using the Linux 4.14.78 kernel.

We have configured with follow:

ecspi2: ecspi@30830000 {
  #address-cells = <1>;
  #size-cells = <0>;
  compatible = "fsl,imx6ul-ecspi";
  reg = <0x0 0x30830000 0x0 0x10000>;
  interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
  clocks = <&clk IMX8MM_CLK_ECSPI2_ROOT>,
    <&clk IMX8MM_CLK_ECSPI2_ROOT>;
  clock-names = "ipg", "per";
  dmas = <&sdma1 2 7 1>, <&sdma1 3 7 2>;
  dma-names = "rx", "tx";
  status = "okay";
   spidev@0 {
         compatible = "myspi,spidev";
        reg = <0>;
        spi-max-frequency = <20000000>;
    };
 };

spi-imx.c

static unsigned int mx51_ecspi_clkdiv(struct spi_imx_data *spi_imx,
          unsigned int fspi, unsigned int *fres)
{
 unsigned int pre, post;
 unsigned int fin = spi_imx->spi_clk;

 if (unlikely(fspi > fin))
  return 0;

 post = fls(fin) - fls(fspi);
 if (fin > fspi << post)
  post++;

 /* now we have: (fin <= fspi << post) with post being minimal */

 post = max(4U, post) - 4;
 if (unlikely(post > 0xf)) {
  dev_err(spi_imx->dev, "cannot set clock freq: %u (base freq: %u)\n",
    fspi, fin);
  return 0xff;
 }

 pre = DIV_ROUND_UP(fin, fspi << post) - 1;

 /* Resulting frequency for the SCLK line. */
 *fres = (fin / (pre + 1)) >> post;   //(24/(0 + 1) >> 0)

 return (pre << MX51_ECSPI_CTRL_PREDIV_OFFSET) |
  (post << MX51_ECSPI_CTRL_POSTDIV_OFFSET);

//here setting the spi clock as 12MHz
}

0、we use the logic analyzer , The actual clock is 12.5MHz

1、why spi source clock aways is 24MHz?we configure it to 20MHz in dts, and will be div to 12MHz

2、clk-imx8mm.c,we donn't konw how to change the spi source clock to another one more than 24MHz

      (static const char *imx8mm_ecspi2_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_40m", "sys_pll1_160m",
        "sys_pll1_800m", "sys_pll3_out", "sys_pll2_250m", "audio_pll2_out", };)

3、if we need the spi clock to 15MHz 18MHz 20MHz,how should we modify?

Pease help me。thanks very much。

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3 Replies

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Contributor I

Can someone help me?

Thanks!

Best Wishes!

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NXP TechSupport
NXP TechSupport

Hi

one can look at attached example boundary devices nitrogen8mm board

linux-imx6/imx8mmn-nitrogen8mm.dtsi at boundary-imx_4.14.x_2.0.0_ga · boundarydevices/linux-imx6 · G... 

Best regards
igor
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Contributor I

Thank you for your response. I know how to modify DTS, but it won't work. The frequency measured by oscilloscope is only 12.5MHz。The current spi clock source is only 24MHz, and only 12MHz after frequency division is calculated according to the formula, so it should be modified to the spi clock source.

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