I am using i.MX8MQEVK board. According to the Reference Manual "IMX8MDQLQM Rev.3, 04/2020", 2.1.2 Cortex A53 Memory Map on page 20, DDR is located at 4000_0000 to FFFF_FFFF (3072MB) with the description (All modules). However, according to 2.1.3 Cortex M4 Memory Map on page 26, DDR is at 4000_0000 to BFFF_FFFF (2048MB). Do these mean M4 cannot accsess 3GB even though all modules can access 3072MB? Don't "All modules" include M4?
modules are like gpu or vpu, Address area 4000_0000 - FFFF_FFFF is for for all modules, 4000_0000 - BFFF_FFFF DDR 2GB is accessible for M4
Thank you, joanxie. I understand.