i.MX7D clock source and power up sequence issue

[felixhsu]

Hi All

The customer use i.MX7D platform have two issue,

1. the clock source will start before  VDD_SNVS_IN, this situation have any concern?

2. the i.MX7D with PMIC PF3000, when first time power up have twice trigger PMIC_ON_REQ and NVCC_SD1, this situation is normal or not? how to explanation this phenomenon?

As below is scope measurement result.

Thanks.

[igorpadykov]

Hi Felix

>1. the clock source will start before  VDD_SNVS_IN, this situation have any concern?

no external voltages/signals should be applied to processor before completion power-up sequence.

>2. the i.MX7D with PMIC PF3000, when first time power up have twice trigger PMIC_ON_REQ

>and NVCC_SD1, this situation is normal or not?

please check power-up sequence and sect.2. i.MX7DS design checklist

Hardware Development Guide for i.MX7Dual and 7Solo Applications Processors
http://www.nxp.com/files/32bit/doc/user_guide/IMX7DSHDG.pdf

Best regards
igor
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[felixhsu]

Hi Igor

1. so external clock should be same time with  VDD_SNVS_IN, right?

2. the Hardware Development Guide which part have explanation twice trigger PMIC_ON_REQ and NVCC_SD1?

Thanks

[igorpadykov]

Hi Felix

>1. so external clock should be same time with  VDD_SNVS_IN, right?

no.

No external voltages/signals should be applied to processor before completion power-up sequence.

Best regards
igor

[felixhsu]

Hi Igor

About question 2, do you have any comments?

I can not found related explanation in the document.

Thanks.

[igorpadykov]

Hi Felix

for question 2 unfortunately I am not aware of documents describing in details.

Suggest follow Hardware Guide.

Best regards
igor