i.MX7 Clock tree undocumented divisors

[vsiles]

Hi !

I'm currently working on a CCM driver for a i.MX7 board. My reference documentation if the refman Rev 0.1 and Linux source code, especially ./arch/arm/mach-imx/clk-imx7d.c from the Toradex SDK I got.

In the table: 5-11, Clock Root Table, we can see that ARM_A7_CLK_ROOT is plugged to ARM_PLL and AUDIO_PLL.

In the Clock Tree (figure 5.2.4) we can see multiple "orange box" divisor /2, especially between ARM_PLL / ARM_PLL_CLK and AUDIO/VIDEO_PLL and AUDIO/VIDEO_PLL_CLK, and then that ARM_A7_CLK_ROOT is using the PLL values divided by 2.

Linux source code makes no mention of these /2 between PLL and CLK_ROOT.

Can someone clarify what these /2 boxes are and if we have to take them into account when computing CLK_ROOT frequencies ?

Best,

V

[b36401]

You can refer the code from BSP regarding to clock tree divisors configuration.

Have a great day,
Victor

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[vsiles]

Dear b36401‌, thank you for your input.

I downloaded FreeRTOS_iMX7D_1.0.1_LINUX from the i.MX7 software page but I can't find much information about clock root definition. The PLL are well-described but most of the clock roots (especially ENET and A7) seems missing. Could you point me to the correct BSP/file to look at ?

[Yuri]

Hello,

  let me remind, i.MX7 FreeRTOS is intended for CM4 core of the i.MX7.

Boot initialization (of CA7) is implemented in U-boot. Please refer to  Chapter 1 (Porting U-Boot

from an i.MX 6/7 Reference Board to an i.MX 6/7 Custom Board) of  i.MX_BSP_Porting_Guide.pdf

regarding U-boot code. 

http://www.nxp.com/webapp/Download?colCode=L4.1.15_2.0.0-LINUX-DOCS&Parent_nodeId=133769948107170617... 

Regards,

Yuri.

[vsiles]

Hi YuriMuhin_ng‌

I think there are some misunderstanding: I read u-boot and linux source code and they don't match the description of the CCM in the i.MX6 reference manual. In the manual, there is an additional "divide by 2" boxes at the location I pointed out (AUDIO_PLL, VIDEO_PLL, ...). Since I'm working on a custom OS, I can leave to u-boot and linux the run-time management of the PLL. I need to know how they are working to be able to manage them correctly.

If I rephrase my question, it would be: The reference Manual and Linux drivers by NXP do not agree on the description of the PLL / CCM. Which one is the correct one ?

Best,

Vincent

[Yuri]

Hello,

  The recent (new) i.MX7 RM release (Rev. 1, 01/2018) still 

has the mentioned /2 dividers.

Regards,

Yuri.

[b36401]

You can also refer to u-boot that configures the processor prior the kernel to start.

Have a great day,
Victor