i.MX6Ull- DDR : Micron : MT41K128M16JT-125 IT:K : Linux Not booting

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i.MX6Ull- DDR : Micron : MT41K128M16JT-125 IT:K : Linux Not booting

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Contributor I

Dear NXP Support Team,

We have custom i.MX6ULL based board with Nanya : NT5CC128M16IP-DII DDR3L part.

Now we are trying to change Nanya to Micron : MT41K128M16JT-125 IT:K

Both are 2Gb DDR.

After changing to Micron : MT41K128M16JT-125 IT:K  board is not booting. So tried to boot the board. But Unfortunately board is not booting.

After that tried to flash the board using MFG tool. But MFG Tool is hanging in Loading Initramfs to DDR.

What may be the issue? While searching I came across setting correct DCD values in U-boot.

Can you please locate me to the Tool to generate DCD Values? Also is there any guide for running that tool ?

Is there any possible issues? If yes please explain more possible issues.

More information about will be a great help.

With Regards,
Keshava Kumar B

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NXP TechSupport
NXP TechSupport

Hi Keshava

similar MT41K256M16 part is used on NXP i.MX6ULL EVK,

one can use i.MX6ULL DDR3 Script Aid and run ddr test

i.MX6ULL_LPDDR2_Script_Aid 

i.MX6/7 DDR Stress Test Tool V3.00 

Presentation describing ddr test:

DES-N1936 i.MX 6UltraLite DDR Tools Overview and Hardware Design Considerations 

new ddr calibration settings should be put in *.cfg file (there is no "Tool to generate DCD Values")

mx6ul_14x14_evk\freescale\board - uboot-imx - i.MX U-Boot 

For i.MX6ULL use similar uboot folder ../mx6ullevk

For using MFG Tool with  new board (or processor) recommended to run ddr test

and update Mfg Tool firmware image with new ddr calibration coefficients found from test.
Update coefficients in uboot/../mx6ul_14x14_evk/imximage.cfg and
rebuild Mfg Tool firmware (files in  ../firmware folder, fsl-image-mfgtool-initramfs-imx_mfgtools.cpio.gz.u-boot).
For rebuilding use sect.6.2 Manufacturing Tool, MFGTool attached Yocto Guide.
Use NXP Linux repository:
https://source.codeaurora.org/external/imx/linux-imx/tree

Best regards
igor
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Contributor I

Thank you igorpadykov‌.

I have taken sample i.MX6ULL DDR3 Script Aid and tried to calibrate the DDR. But unfortunately I am getting error while calibrating the DDR. Here is the DDR test results:


============================================
        DDR Stress Test (3.0.0)
        Build: Dec 14 2018, 14:13:23
        NXP Semiconductors.
============================================

============================================
        Chip ID
CHIP ID = i.MX6 UltraLiteLite(0x65)
Internal Revision = TO1.1
============================================

============================================
        Boot Configuration
SRC_SBMR1(0x020d8004) = 0x00000090
SRC_SBMR2(0x020d801c) = 0x01000001
============================================

ARM Clock set to 528MHz

============================================
        DDR configuration
DDR type is DDR3
Data width: 16, bank num: 8
Row size: 14, col size: 10
Chip select CSD0 is used
Density per chip select: 256MB
============================================

Current Temperature: 40
============================================

DDR Freq: 528 MHz

ddr_mr1=0x00000004
Start write leveling calibration...
running Write level HW calibration
  MPWLHWERR register read out for factory diagnostics:
  MPWLHWERR PHY0 = 0x00000f0f

Write leveling calibration completed, update the following registers in your initialization script
    MMDC_MPWLDECTRL0 ch0 (0x021b080c) = 0x00000000
Write DQS delay result:
   Write DQS0 delay: 0/256 CK
   Write DQS1 delay: 0/256 CK

Starting DQS gating calibration
. HC_DEL=0x00000000    result[00]=0x00000011
. HC_DEL=0x00000001    result[01]=0x00000011
. HC_DEL=0x00000002    result[02]=0x00000011
. HC_DEL=0x00000003    result[03]=0x00000011
. HC_DEL=0x00000004    result[04]=0x00000011
. HC_DEL=0x00000005    result[05]=0x00000011
. HC_DEL=0x00000006    result[06]=0x00000011
. HC_DEL=0x00000007    result[07]=0x00000011
. HC_DEL=0x00000008    result[08]=0x00000011
. HC_DEL=0x00000009    result[09]=0x00000011
. HC_DEL=0x0000000A    result[0A]=0x00000011
. HC_DEL=0x0000000B    result[0B]=0x00000011
. HC_DEL=0x0000000C    result[0C]=0x00000011
. HC_DEL=0x0000000D    result[0D]=0x00000011
ERROR FOUND, we can't get suitable value !!!!
dram test fails for all values.

Error: failed during ddr calibration

Can you please suggest me what may be causing above issue.

Thanks in advance.

With Regards,

Keshava Kumar B

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NXP TechSupport
NXP TechSupport

Hi Keshava

such error may be caused by board ddr layout, suggest to recheck

sect.3.4.1 DDR routing rules Hardware Development Guide for the i.MX 6ULL Applications Processor

However DQS gating error may be ignored if other tests passed.

Best regards
igor

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