i.MX6ULL CSI_MCLK

[lotharfelten]

Hello,

I have no clock output on the CSI_MCLK ball. The TRM states that the CSI module is not responsible for the clock output but that it's driven from the CCM directly.

I checked the following registers:

SW_PAD_CTL_PAD_CSI_MCLK (0x20e_0460) -> 0x1b0b0

SW_MUX_CTL_PAD_CSI_MCLK (0x20e_01d4) -> 0x0 (MUX is ALT 0)

CCM_CCGR2 (0x20c_4070) -> 0x0FFF_003C (csi_clk_enable, but I'm not sure if this is for the CSI module)

CCM_CSCDR3 (0x20c_403C) -> 0x14041  (24MHz from osc_clk)

Are there some other registers in the CCM/IOMUX I need to set to output the 24MHz clock?

[lotharfelten]

The pinmux tool recommends these settings:

  /* IOMUXC_SW_MUX_CTL_PAD_CSI_MCLK register modification value */
  IOMUXC_BASE_PTR->SW_MUX_CTL_PAD[100U] = 0U;
  /* IOMUXC_SW_PAD_CTL_PAD_CSI_MCLK register modification value */
  IOMUXC_BASE_PTR->SW_PAD_CTL_PAD[100] =
                        IOMUXC_SW_PAD_CTL_PAD_DSE(6U) |
                        IOMUXC_SW_PAD_CTL_PAD_SPEED(2U) |
                        IOMUXC_SW_PAD_CTL_PAD_PKE_MASK;

But there is no clock. I assume it's still gated somewhere.

[igorpadykov]

Hi Lothar

one can check CSI_MCLK settings in imx6ull-14x14-evk.dts
imx6ull-14x14-evk.dts\dts\boot\arm\arch - linux-imx - i.MX Linux kernel 

and test on i.MX6ULL EVK board with demo images from

i.MX Software | NXP 

Best regards
igor
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