i.MX6UL VSNVS Issue: Voltagelevel of VDD_SNVS_CAP @ Pin N12?

[wowa]

Dear Community,

i have an issue regarding the VDD_VSNVS_IN. I am using the PMIC "MC34PF3000A7EP" and supply the VDD_VSNVS_IN with it. Normally the applied LDO in the PMIC generates 3V. But i measure at the output only 1,7V. If i disconnect the PMIC to the CPU at VDD_VSNVS_IN the 3V is back. So i think something is internally wrong  at the i.MX6UL. I noticed also that the LDO has only 1mA maximum.

If i measure VDD_SNVS_CAP at the external capacity i can only measure 1,1V. That should be 2,5V right ?

So can anyone give me the correct output voltage level for VDD_SNVS_CAP at Pin N12 ? Especially voltage level inclusive tolerances.

Thanks beforehand

Best Regards

Wolfgang Walter

[wowa]

Hi Jose,

many thanks for your attention! You brought me to some new ideas and i have solved one problem yet. Now i got the 3V. This issue based to the "Boot mode" configurations. To get the logic 0 we used to tie the BOOT_MODE1 pin directly to GND. After i used a 10k pull-down, the overload run off. I found this recommendation in the Hardware Development Guide. But please let me explain, i think the reader will have in this section different interpretations in this guide:

<quote>

For BOOT_MODE1 and
BOOT_MODE0, use one of the
following options to achieve logic 0:
• Tie to GND through any value
external resistor
• Tie directly to GND
For logic 1, use one of the following:
• Tie directly to the VDD_SNVS_IN rail
• Tie to the VDD_SNVS_IN rail
through an external resistor 10 kΩ. A
value of 4.7 kΩ is preferred in
high-noise environments.

</quote>

I thought it does not matter if the pins get tied directly to GND or with a pulldown. Now i think so:

- BOOT_MODE1 tie to GND with external resistor.

- BOOT_MODE0 tie directly to GND.

Is that correct ? This thesis goes stronger if i measure the BOOT_MODE0 pin with a pulldown to GND. There is right now the voltage from VDD_VSNVS_IN. I think i should tie this pin directly to GND instead with a pulldown.

Can anyone give me right ?

Thanks

Wolfgang

[reyes]

Hello Wolfgang,

I did some tests to confirm your theory and I think you are correct, you will have better performance if BOOT_MODE0 is directly tied to GND instead of pulling it down with an external resistor.

Have a great day,
Jose

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[reyes]

Hi Wolfgang Walter,

Seems like your application is trying to consume more current than the VSNVS LDO from the PMIC can give.

In the attached schematic you can see some hints to reduce the current consumption for VDD_SNVS_IN, if it is not possible to apply the recommendations, then I would recommend you to use an external LDO to be able to supply all the VDD_SNVS loads, like U701 circuit in page 10 of the attached schematic.

Have a great day,
Jose

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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