i.MX6SX failed to enable pcie

[randysilagi]

I have the Saber i.MX6sx board and I can't get the PCIe to be enabled, that is lspci returns nothing.  The default kernel with this board has PCI disabled.  I have enabled PCI, PCIe, the Freescale i.MX6 PCIe controller,  PCIe RC mode, and PCI express Port bus support.  I have:  /sys/bus/pci/drivers::  ci_hdrc_pci  ehci-pci pcieport and /sys/bus/pci_express.  However /sys/bus/pci/devices is empty and lspci returns nothing. I expect to see the Root Complex bridge there, at least 0000:00:00.0.

Here is the list of errors I get during boot:

8ffc000.pcie supply pcie-bus not found, using dummy regulator
imx6q-pcie 8ffc000.pcie: phy link never came up

imx6q-pcie 8ffc000.pcie: failed to initialize host: ret: -22
imx6q-pcie: probe of 8ffc000.pcie failed with error -22

My questions are:

Why does devm_regulator_get(pp->dev,"pcie-bus")  fail?  Is that what causes imx6_pcie_link_up() to fail?  Then where does regulator_get find the name "pcie-bus"?  How does regulator_dev_lookup list of names get populated?

Thank you for reading and I greatly appreciate any help or ideas.

Randy Silagi

[mattiasbarthel]

I have traced the hang to:

imx6sx-pcie imx6_add_pcie_port  
IS_ENABLED(CONFIG_PCI_MSI
platform_get_irq_byname
devm_request_irq
dw_pcie_host_init
pcie-designware: dw_pcie_host_init  
pcie-designware: of_pci_range_parser_init  
pcie-designware:  for_each_of_pci_range
pcie-designware: of_pci_parse_bus_range  
pcie-designware:  IS_ENABLED(CONFIG_PCI_MSI
pcie-designware: pp->ops->host_init  
imx6_pcie_host_init:  imx6_pcie_assert_core_reset
imx6_pcie_host_init:  imx6_pcie_init_phy
imx6_pcie_host_init:  imx6_pcie_deassert-core-reset
imx6_pcie_host_init:  dw_pcie_setup_rc
dw_pcie_setup_rc:  1
--------------------

static int imx6_pcie_host_init(struct pcie_port *pp)
{
int ret;
struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);

/* enable disp_mix power domain */
if (is_imx7d_pcie(imx6_pcie))
pm_runtime_get_sync(pp->dev);
printk(KERN_CRIT"imx6_pcie_host_init: imx6_pcie_assert_core_reset\n");
imx6_pcie_assert_core_reset(pp);
printk(KERN_CRIT"imx6_pcie_host_init: imx6_pcie_init_phy\n");
imx6_pcie_init_phy(pp);
printk(KERN_CRIT"imx6_pcie_host_init: imx6_pcie_deassert-core-reset\n");
imx6_pcie_deassert_core_reset(pp);
printk(KERN_CRIT"imx6_pcie_host_init: dw_pcie_setup_rc\n");
dw_pcie_setup_rc(pp);
printk(KERN_CRIT"imx6_pcie_host_init: imx6_pcie_start_link\n");
ret = imx6_pcie_start_link(pp);
if (ret < 0)
return ret;
printk(KERN_CRIT"imx6_pcie_host_init: dw_pcie_msi_init\n");
if (IS_ENABLED(CONFIG_PCI_MSI))
dw_pcie_msi_init(pp);

return 0;
}

------------------------

void dw_pcie_setup_rc(struct pcie_port *pp)
{
u32 val;
u32 membase;
u32 memlimit;
printk(KERN_CRIT"dw_pcie_setup_rc: 1\n");
/* set the number of lanes */
dw_pcie_readl_rc(pp, PCIE_PORT_LINK_CONTROL, &val);
val &= ~PORT_LINK_MODE_MASK;
switch (pp->lanes) {
case 1:
val |= PORT_LINK_MODE_1_LANES;
break;
case 2:
val |= PORT_LINK_MODE_2_LANES;
break;
case 4:
val |= PORT_LINK_MODE_4_LANES;
break;
}
printk(KERN_CRIT"dw_pcie_setup_rc: 2\n");

--------------------------------------

So it seems that the first read against the PCI block is blocking. Maybe it has no power?

What is missing?

[mattiasbarthel]

Btw,

I did according to : FSL Community BSP 

"Platform source code download"

and followed the instructions.

So I got the code from the snapshot dated yesterday.

Regards,

Mattias

[mattiasbarthel]

Randy,

What were the Kconfig primitives that you turned on?

I turned on CONFIG_PCI and i.IMX6 PCIe driver

I did the dtsi regulator change and got around:

"8ffc000.pcie supply pcie-bus not found, using dummy regulator"

But now I get:

cpu cpu0: dev_pm_opp_get_opp_count: device OPP not found (-19)

And the kernel startup hangs.

Regards,

Mattias

[markschnell]

Randy,

Where you able to get your suspected GPIO pin problem fixed via the hints that Igor provided above?

I'm going thru the same trials and tribulations that you did. The...

        imx6_pcie->pcie_bus_regulator = devm_regulator_get(pp->dev,
                    "MPCIE_3V3");

...change seems to have made the PCI driver happier. But I'm still stuck on getting the...

     "imx6q-pci 8ffc000.pcie: phy link never came up: error"

and I've been unsuccessful in gleaning any help from Igor's last post.

BTW. I'm just using a stock imx6sxsabresd eval board.

Cheers...   Mark

[randysilagi]

Hi Mark,

Get some mPCIe board and stuff it in there.  I used the SilverStone, Wi-Fi, 80211.ac, module.  This is a half-height module.   We tried a full height USB module and that did not seem to work.  Make sure the secure the WiFi module with some screws or tie wraps.

Not sure why this worked.  The H/W guy and I assumed that the Root Complex is trying to determine the clock-rate of the slave device, and since nothing is there is turns off.  We assume that the board is attempting to save power.  No reason to power some interface that is not connected to anything.  Also I could not find a way to configure the board to NOT turn the power off. 

Maybe Igor know how to configure the Root-comples to not disable itself?   Why does Freescale have code with bugs that need to be discovered and fixed by customers?  The i.MX6 is almost 6 years old, no one has ever had this problem before?

Anyway, let me know if that works, and if you find a way to disable the power down.

rock on;

Randy S.

[markschnell]

Randy,

Thanks for the notes and thoughts.

As it happens, I finally tracked down my PCI issue to the Yocto build of U-boot not picking up my U-boot config changes (i.e. turning on PCI via '#define CONFIG_CMD_PCI').  (As it happens, I had missed the directory re-org that NXP/Freescale did on the U-boot code sometime on or before their 4.1.15_2.0.1_ga BSP and so my .bbappend & .patch files were in the wrong file path.)  And with no PCI code in U-boot, there was no ‘device enumeration’ info passed up to the Kernel, and thus a very bored PCI kernel driver.

I'm afraid that I have not needed to delve into the "PCI bus is turned off if there are not PCI endpoints installed". My application always used the PCI endpoint, so I have no need to manage the PCI power/functionality.

Cheers...   Mark

[igorpadykov · Accepted solution]

Hi Randy

what bsp used in the case, please try official nxp from

http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/?id=rel_imx_4.1.15_1.2.0_ga 

Documentation Bundle

http://www.nxp.com/webapp/Download?colCode=L4.1.15_1.2.0_LINUX_DOCS&Parent_nodeId=133769948107170617... 

error log "8ffc000.pcie supply pcie-bus not found, using dummy regulator"

may mean that used wrong dts file, please check record :

MPCIE_3V3 (it is power for PCIe connector "PCIE_PWR_EN", SPF-27962 i.MX6SX SabreSD
schematic p.16, power is enabled by gpio2 1 (pad ENET1_CRS) )

 i.MX6SX SabreSD schematic
Schematics (1)
IMX6SOLOX-SABRESDB-DESIGNFILES
http://www.nxp.com/products/software-and-tools/hardware-development-tools/sabre-development-system/s...

Also may be recommended to try verifed modules described in Chapter 40 PCI Express Root Complex Driver
Linux Manual from Documentation Bundle.

Best regards
igor
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[randysilagi]

Hi Igor,

Thanks for the info. I'm using the exact BSP you listed and the Documentation bundle you listed.

So, in my DTS file, imx6sx-sdb-dtsi I have;

reg_pcie: regulator@8 {

    ....

   regulator-name = "MPCIE_3V3";

However in pci-imx6.c I have:

imx6_pcie->pcie_bus_regulator = devm_regulator_get(pp->dev, "pcie-bus");

So, do you think that  devm_regulator_get is doing a string compare on pcie-bus with MPCIE_3V3?

I will change pci-imx6.c now and give it a try. 

Could this also be a problem with the GPIO pins?  In pci_imx6.c I have:

imx6_pcie->power_on_gpio = of_get_named_gpio(np, "power-on-gpio", 0);

I could find "power-on-gpio" in any of the DTS files that are being used.  In my DTS files I have

pinctrl_pcie_reg: pciereggrp {
            fsl,pins = <
                MX6SX_PAD_ENET1_CRS__GPIO2_IO_1    0x10b0

reg_pcie: regulator@8 {

...

gpio = <&gpio2 1 0>;

I don't have that string, "power-on-gpio" in any of the DTS files.

Thanks for your help;

Randy S.

[randysilagi]

Hi Igor,

That change:

    imx6_pcie->pcie_bus_regulator = devm_regulator_get(pp->dev,
            "pcie-bus");

TO:
    imx6_pcie->pcie_bus_regulator = devm_regulator_get(pp->dev,
            "MPCIE_3V3");

Fixed my regulator problem.   I still have a problem with one of the GPIO pins.  I don't see how the pci-imx6.c code finds the GPIO pin, "power-on-gpio".  However it does find the "disable-gpio" pin, using of_get_named.  How does the DTS file translate between gpio = <&gpio 1 0> and "power-on-pgio"?

of_get_named_gpio(np, "power-on-gpio", 0);

in the DTS files I have:

reg_pcie: regulator@8 {

    regulator-name = "MPCIE_3V3";

    gpio = <&gpio2 1 0>;

}

&pcie {
    pinctrl-names = "default";
    pinctrl-0 = <&pinctrl_pcie>;
    reset-gpio = <&gpio2 0 0>;
    status = "okay";
};

        pinctrl_pcie: pciegrp {
            fsl,pins = <
                MX6SX_PAD_ENET1_COL__GPIO2_IO_0 0x10b0
            >;
        };

        pinctrl_pcie_reg: pciereggrp {
            fsl,pins = <
                MX6SX_PAD_ENET1_CRS__GPIO2_IO_1    0x10b0
            >;
        };

[igorpadykov]

Hi Randy

one can test it in uboot, check mx6sxsabresd.h " #define CONFIG_CMD_PCI" on

uboot-imx.git - Freescale i.MX u-boot Tree 

also please check attached Release Notes Table 20. Known issues and workarounds for i.MX 6SoloX

below link may be useful

PCIe link doesn't come up with XIO2001 PCI brid... | NXP Community 

Best regards
igor