i.MX6SDL IPU CSI capability when use both parallel camera port and MIPI-CSI2.

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i.MX6SDL IPU CSI capability when use both parallel camera port and MIPI-CSI2.

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satoshishimoda
Senior Contributor I

Hi community,

We have a question about i.MX6SDL IPU CSI capability.

Please see page 2790, 2791 in IMX6SDLRM Rev.1.

There are the CSI capability to input via parallel port or MIPI-CSI2 individually.

Then, how about when use both port (parallel and MIPI-CSI2)?

For example, how judge whether i.MX6SDL can receive the following input?

Parallel: 1920 x 1080 x 30fps x 1.35 x 2(YUV422 over 8 bit) = 168MHz

MIPI-CSI2: 1280 x 1024 x 30fps x 1.35 x 1.5(RGB888) = 89MHz (1.9Gbps)

Best Regards,

Satoshi Shimoda

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Yuri
NXP TechSupport
NXP TechSupport

  The mentioned restriction of 240 MHz relates to single CSI port of IPU;
thera are no specifications about total restriction for both CSI ports of single IPU.

Regards,

Yuri

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Yuri
NXP TechSupport
NXP TechSupport

The i.MX6 S / DL can capture the mentioned inputs.
But, also, please take into account memory throughput, since
memory usually is used by others applications too.


Have a great day,
Yuri

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satoshishimoda
Senior Contributor I

Dear Yuri,

> The i.MX6 S / DL can capture the mentioned inputs.

Would you let me know how did you judge it?

In the mentioned case, 168MHz + 89MHz = 257MHz > 240MHz(max speed of parallel interface), so I guessed i.MX6SDL cannot capture them.

But your reply was it is possible.

Do the input capability of prallel port and MIPI-CSI2 don't effect each other?

In other words, can IPU capture 125MHz (2Gbps, 2 data lane configure) data via MIPI-CSI2 when IPU receives 240MHz data via parallel port?

> But, also, please take into account memory throughput, since

> memory usually is used by others applications too.

Yes, we think we should evaluate with actual use case.

But at first, we have to judge whether i.MX6SDL satisfies our use case theoretically.

If i.MX6SDL cannot satisfy our use case, we should evaluate i.MX6DQ instead of i.MX6SDL, or we should surrender using i.MX6 series.

Best Regards,

Satoshi Shimoda

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Yuri
NXP TechSupport
NXP TechSupport

  The mentioned restriction of 240 MHz relates to single CSI port of IPU;
thera are no specifications about total restriction for both CSI ports of single IPU.

Regards,

Yuri

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