i.MX6Q TZASC Interrupt

[vsiles]

Hi,

I am looking at the interrupt table in the i.MX6Q reference manual and the security manual (under NDA), and I don't see any entry about the interrupt of the TZASC component. I guess it might be one of the SNVS interrupt, but I don't know which one.

Can someone point me the correct interrupt number ?

Best,

V.

[Yuri]

Hello,

  CSU interrupt should be used.

Have a great day,

Yuri

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[vsiles]

Dear YuriMuhin_ng​,

the interruption table says:

CSU interrupt request 1. Indicates to the processor that one or more alarm inputs were

asserted.

However I find no other mention of a CSU interrupt. I guess it is a "OR" of several interrupts, one of them being the TZASC. Is there a list of all the sources that might raise the CSU interrupt ?

Best,

Vincent

[Yuri]

Hello,

   " ... the CSU manages system security alarms. These alarms are signals routed from
various SoC peripherals and I/O that indicate security violation conditions".

   Please refer to the "Security Reference Manual for i.MX6Dual, 6Quad, 6Solo, and 6DualLite"

for more details what SoC peripherals and I/O are affected.

Regards,

Yuri.

[vsiles · Accepted solution]

Dear YuriMuhin_ng‌,

after failing to get the TZASC interrupt through the CSU interrupt, I plugged a debugger and saw that the triggered interrupt was in fact "140 ASC1 ASC1 interrupt request."

I just leave this here, for future readers.

Best regards,

V.