i.MX6Q TTL LCD u-boot and max resolution

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

i.MX6Q TTL LCD u-boot and max resolution

Jump to solution
2,666 Views
joshkurland
Contributor IV

Hello,

I am designing a video adapter that I intend to run from the output of the TTL LCD output port of an iMX6Q Wandboard.  But before I get started, I would like to ask a few questions.

1.)  What is the maximum resolution achievable over the TTL port?  According to the reference manual (IMX6DQRM.pdf page 2699) the parallel port supports SMPTE274 (1080i/p), which is the exact format that I need.  However most of my experience with this type of interface has been with very small LCDs.  Can anyone confirm that the 1080i/p standard is achievable? 


2.)   Currently I have just the TTL port enabled by adding to the console parameter:  'video=mxcfb0:dev=lcd,1920x1080@60,if=RGB24'.  I can measure data off the pins at the right times, but the pixel clock is not correct.  I believe this is due to my u-boot settings, specifically using RGB24.  If I intend to use the 20-bit YCrCb mode, what would be the appropriate setting?  Is there a table of all acceptable display settings in a reference manual that I can read?

3.)  Displaying over HDMI and TTL at the same time should be possible.  I assume the u-boot settings would look something like: 'video=mxcfb0:dev=lcd,1920x1080@60,if=see_question_2 video=mxcfb1:dev=hdmi,1920x1080M@60,if=RGB24.  Does it matter which frame buffer a display is on?  What would happen if I swap them so that HDMI is on fb0 and LCD is on fb1?


4.)  I am tinkering around with the idea of adding a small LVDS touch-enabled screen to my project as well.  This would be intended to display something else than what is on the HDMI and TTL LCD.  What will the u-boot settings look like then?  I have seen these three displays all operating this way before, but I am not sure how to replicate that setup. 


Thank you,

Josh Kurland

Labels (3)
Tags (1)
0 Kudos
1 Solution
958 Views
rogerio_silva
NXP Employee
NXP Employee

Hi,

1. Yes, it can support 1080p@60 + WSXGA+@60 at the same time. The combined rate for the two ports is up to 240 MP/sec.

2. The 1080 resolution wasn't tested on Freescale BSP/Kernel. The tested resolutions are described on release notes within each BSP package (e.g. SABRE_SD_Release_Notes_L3.0.35_1.1.0.pdf). If you're seeing a wrong pixel clock, maybe the display timings are wrong or maybe Linux got another seting.

3. The kernel command line configuration for display may vary according the kernel release. You will find the correct parameters at release notes contained at the BSP package you're using. For example, for BSP release L3.0.35_1.1.0 the video command line is: video=mxcfb0:dev=ldb,LDB-XGA,if=RGB666 video=mxcfb1:dev=hdmi, 1920x1080M@60,if=RGB24

If you switch the fb0 with fb1, Linux will switch the primary display. For example, if lcd was the /dev/fb0, it will now be the /dev/fb1.

4. You will have to add the small LVDS timings on Linux Kernel and add the name you gave to this settings on linux kernel command line.

Rgds

Rogerio

View solution in original post

0 Kudos
4 Replies
959 Views
rogerio_silva
NXP Employee
NXP Employee

Hi,

1. Yes, it can support 1080p@60 + WSXGA+@60 at the same time. The combined rate for the two ports is up to 240 MP/sec.

2. The 1080 resolution wasn't tested on Freescale BSP/Kernel. The tested resolutions are described on release notes within each BSP package (e.g. SABRE_SD_Release_Notes_L3.0.35_1.1.0.pdf). If you're seeing a wrong pixel clock, maybe the display timings are wrong or maybe Linux got another seting.

3. The kernel command line configuration for display may vary according the kernel release. You will find the correct parameters at release notes contained at the BSP package you're using. For example, for BSP release L3.0.35_1.1.0 the video command line is: video=mxcfb0:dev=ldb,LDB-XGA,if=RGB666 video=mxcfb1:dev=hdmi, 1920x1080M@60,if=RGB24

If you switch the fb0 with fb1, Linux will switch the primary display. For example, if lcd was the /dev/fb0, it will now be the /dev/fb1.

4. You will have to add the small LVDS timings on Linux Kernel and add the name you gave to this settings on linux kernel command line.

Rgds

Rogerio

0 Kudos
958 Views
YixingKong
Senior Contributor IV

Josh

We are sorry for getting back to you so late. Are you still stuck with the issue? If you have somehow to resolved the issue, can we close the discussion? If you still need help, please feel free to reply with an update to this discussion.

Thanks,
Yixing

0 Kudos
958 Views
joshkurland
Contributor IV

Thank you for getting back to me.  I have made some progress, but I have not been able to successfully complete the task. 

I have learned that the SMPTE274 video standard has no Freescale support at the time of my research.  However, Freescale has provided a patch for the BT1120 standard, which is very similar to 274 and is an acceptable substitute for my project.  I had tried applying the patch to my kernel, but had issues with setting the pixel clock to the correct rate.  Regardless of the changes I had made, the pixel clock always remained at 50MHz, instead of the 74.25MHz that it is supposed to be.  I was receiving help from Qiang Li, who I believe wrote the original BT1120 patch.  However he was not able to resolve the problem.  Here is the link to that discussion (Patch to Support BT656 and BT1120 Output For i.MX6 BSP). 

I have applied this patch to a SabreLite board with kernel 3.0.35_4.1.0 and a Wandboard-quad with 3.0.35_4.0.0.  I do not have access to a SabreSD board at this time (which the patch was originally written for).  I did not have success on either board.  Is it possible to receive further support in implementing this video standard?

I would prefer using the SMPTE274 standard in 20-bit mode over the BT1120 standard with 16-bit.  Is Freescale going to release a future update to support this standard, as it is described in the datasheet?  If that is not planned, is Freescale going to push the BT1120 patch upstream to the new 3.10 kernel on meta-fsl? 

Thank you,

Josh Kurland

0 Kudos
958 Views
YixingKong
Senior Contributor IV

Josh

I will branch your question into an internal group and assign an engineer to work on it.

Regards,

Yixing

0 Kudos