i.MX6Q Stop mode problem

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

i.MX6Q Stop mode problem

1,280 Views
raphaëled_
Contributor I

Hi all,

I’m currently working on i.MX6Q Sabre SDP (WEC7) and I try to improve the power management during a suspend/resume of my board. For the moment, the power saving is extremely low, the board consumes 4W in stop mode.

I suspect this high consumption coming from the screen; after all, the board consumes only 2Watts without the screen. 

Regarding the code, the LPM bit, vstby bit, sbyos bit are set before the WFI.

The analog misc0 stop mode config is set to 0 and the ENABLE_WEAK_LINREG in the PMU PMU_REG_2P5 register is activated.

I checked the PMU_MISC0 too, the stop mode config is 0 by default (Deep sleep mode).

My idea for the moment, is that the stop mode is correctly set or considered because I obtain some results when I shut down manually LD0 2P5 and a better result with the LD0 1P1 shut down but the board doesn’t resume, which is normal I suppose… And if I referred to the Reference Manual, reg1p1 and reg2p5 should be off with a stop_mode_config=0.

Have I forget something? Some clues?

Thank you in advance.

Labels (2)
Tags (5)
0 Kudos
7 Replies

794 Views
AnsonHuang
NXP Employee
NXP Employee

Hi, Rap

     LDO 1P1 is for PLL, and LDO2P5 is for many modules(Pre drive of DDR PAD), the 2P5 should be always there during STOP mode, that is why we need to enable weak 2P5 before entering DSM mode, as when DSM mode is entered, the whole anatop module will into stop mode, and 2P5 LDO will be disabled. If you have stop_mode_config set to 1, then 2P5 LDO and 1P1 will be enabled there even CCM enter STOP mode.

     So, you need to enable weak 2P5 for DSM mode.

0 Kudos

794 Views
raphaëled_
Contributor I

Hi Yongcai,

Thank you for your quick answer.

I if I all understand, my first try was exactly what you describe,...

As I said, the LPM is set to STOP mode, the analog misc0 stop mode config is set to 0 (DSM, right?) and the ENABLE_WEAK_LINREG in the PMU PMU_REG_2P5 register is activated. With this configuration, my board still consumes 4W in suspend mode. I don't know if it's normal or not... But it's not really different of a RUN mode.

0 Kudos

794 Views
AnsonHuang
NXP Employee
NXP Employee

Hi, Rapha

     I think you can measure the VDDARM_CAP to see whether system is actually in DSM mode, the VDDARM_CAP should be ~0V. And just want you to know that, DSM mode only save the power of our SOC, not sure whether your board has other peripheral devices that consumes many power in DSM mode. Anyway, first step, can you measure the VDDARM_CAP's voltage? If it is indeed in DSM mode, you would see the power consumption of VDDSOC will be very small, less than 10mA. normally it should be several hundreds mA.

794 Views
raphaëled_
Contributor I

Hi Yongcai,

I take a look on the board schematics to see where is the VDDARM_CAP. How can I measure this voltage? Is there some test points?
But I think you're right, That makes sense...

So, my problem is now the screen supply (my display driver and backlight driver seem to be okay, screen turn black on suspend etc...), my screen is linked with the LVDS connector. I saw at one moment on the board schematic that LVDS seems to be supply by NVCC_LVDS2P5 and this sentence was following :

"NVCC_LVDS2P5 also powers on-chip DDR I/O predrivers,

and must be powered whether LVDS is used or not."

So my screen has to be supplied?

0 Kudos

794 Views
AnsonHuang
NXP Employee
NXP Employee

Hi,

     This sentence means NVCC_LVDS2P5 must be supplied during DSM mode, but for LVDS, it does NOT matter whether you connect the screen or not, just make sure that there is 2.5V supplied to NVCC_LVDS2P5.

     For the measurement of VDDARM_CAP, I think you can measure the CAPs on this power rail, there should be many CAPs connected in this rail. It is right in the back side of the i.MX6Q chip, you need to find the right CAP, or you can just measure the pin4 of PMIC, it is PMIC_VSTBY_REQ pin, it should be high when CCM is in STOP mode.

     On SDP board, I think you can just measure the voltage drop of R21(VDDSOC_IN) or R27(VDDARM_IN), it is a 0.02 Ohm resistor, then we can get the power consumption of VDDARM and VDDSOC. For example, if the voltage between two sides of R21 is 0.6 Volt, then the power consumed by VDDSOC_IN is 0.12 / 0.02 = 6mA. Please measure these power consumption first, I guess the reason why your board still consume many power in DSM mode should be the peripheral device still consuming power, otherwise, CCM should be not in STOP mode.

0 Kudos

794 Views
raphaëled_
Contributor I

Hi Yongcai,


Sorry for the late answer. I take a look on the board, I’ve found the R21(VDDSOC_IN), but I saw no R27 written on the board, I suppose it’ the 0.02 Ohm resistor just on the top of ARM word.
So I take some measures, on boot state, R21 : 16mV and R27 : 3mV, and during the stop mode R21 : 8mV and R27 : 0mV.

0 Kudos

794 Views
AnsonHuang
NXP Employee
NXP Employee

Hi,

     R27 is right around R21, they both surround L11, in stop mode, R27 ~0mV makes sense, but R21 ~8mV does not. It meant VDDSOC still consume about 400mA???, even in boot state, 16mV also not make sense, 800mA is too much. Normally, VDDSOC should be around 400mA in boot state, and about 4mA in STOP mode.

     If you measured right about R27(VDDARM_IN), then I guess system did go into STOP mode, as it is ~0mV. Please measure pin4 of PMIC to make sure system is in STOP mode, it should be high when suspend. And please redo the measurement of R21? As 16mV and 8mV is obviously too high....

0 Kudos