i.MX6Q SABRE SDP/B DDR3 Register Programming Aid

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

i.MX6Q SABRE SDP/B DDR3 Register Programming Aid

584 Views
hirosuzu
Contributor I

Please tell me  about the question.

He recommended setting value is 1.
Why is this?

DRAM_Data is single-end signals.
So I think it is "CMOS input type" setting.

 

 IOMUXC_SW_PAD_CTL_GRP_DDRMODE

 

  bit17 DDR_INPUT
   DDR / CMOS Input Mode Field
   Select one out of next values for group: DDRMODE (Pads: DRAM_D[63:0]).
    0: CMOS input type
    1: Differential input mode (recommended)"

Best regards,

Labels (1)
0 Kudos
1 Reply

438 Views
Yuri
NXP Employee
NXP Employee

Hello,

  Hope the following clarifies the issue.

https://community.nxp.com/message/447244 

Regards,

Yuri.

0 Kudos