i.MX6Q ONOFF debounce not 750ms

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i.MX6Q ONOFF debounce not 750ms

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donfreiling
Contributor III

The IMX6DQRM states that PMIC_ON_REQ will be asserted if the ONOFF input is held low for a debounce duration of 750ms. On our custom board I am seeing a debounce time of only 76 micro seconds. 76us is not a reasonable duration for mechanical debouce, it should be at least 20ms. I've attached a scope trace showing ONOFF and PMIC_ON_REQ.

Questions:

1) Which clock is used to measure the ONOFF debounce time?

2) Is this an error in the RM or is it an indication of clock problem in our design?

Regards,

Don

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igorpadykov
NXP Employee
NXP Employee

Hi Don

there is no debounce time—the button signal is sampled by

32kHz clock, and that is the only way to deal with noise.

Best regards

igor

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donfreiling
Contributor III

According to the Reference Manual (IMX6QDRM Rev.3 07/2015), Section 10.5 (page 537):

10.5 ONOFF (Button)

The chip supports the use of a button input signal to request main SoC power state changes (i.e. On or Off) from the PMU. The button is used to power On and Off the SoC using an always-on (e.g., coincell battery-backed) power domain.

• When the chip main power supply is Off, a button press greater in duration than 750

   ms asserts an output signal to request power from a power IC to power up the SoC.

• When the chip main power supply is On, a button press between 750 ms and 5

  seconds will send an interrupt to the core to request that software bring down the

  SoC safely. Software may respond to the interrupt by saving the processor state and

  then setting a control bit that requests to the power IC the removal of the main power

  supply.

• Button presses greater than 5 seconds, when the SoC is powered, results in a direct

   hardware power down request signal to the power IC without providing a software

   interrupt first. This long button press initiates a hardware-enforced mode which is

  applicable when software is unable to power Off the device.

The button is connected to input ONOFF and the power IC is connected the chip output

PMIC_ON_REQ. The chip must have TEST_MODE deasserted. An always-On supply

(e.g. coincell) is needed in the system for this feature.

According to this I should see a 750ms delay between ONOFF asserted and PMIC_ON_REQ but as you can see from the scope trace I posted the delay is only 76us.

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