i.MX6Q MMDC: Priority for 1 ARM core?

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i.MX6Q MMDC: Priority for 1 ARM core?

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Contributor III

Hi,

I'd like to know if the MMDC can be configured to give priority to core #1 (out of the 4 ARM cores) for memory access.

Thanks,

Harald

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NXP Employee
NXP Employee

Hi, Harald

     As far as I know, all the CPUs have same priority of accessing MMDC, and can NOT be adjusted.