i.MX6Q: Enable 4GByte Space by x16bit 8Gbit DDR3 x 4

norishinozaki · ‎09-25-2015

Hello Champs,

My customer would like to design 4GByte memory space by 4 pieces of x16bit 8Gbit DDR3.

RM and HDG only show us how to implement with 8 chips of x16bit 4Gbit DDR3.

Is it possible?

Best regards,

Nori Shinozaki

norishinozaki · ‎09-25-2015

Hello,

I found the similar article.

000_0000 256Mb

000_0001 512Mb

001_1111 8Gb (1GB)

011_1111 16Gb (2GB) - default

111_1111 32Gb (4GB)

Is this settings all possible to i.MX6Q?

Best regards,

Nori Shnozaki

igorpadykov · ‎09-25-2015

Hi Nori

in general this configuration is possible, however one needs just to check DDR

datasheet if i.MX6 MMDC can to support it (COL(max.)=12 ROW(max.)=16)

CS0_END caclulations are given on p.31 presentation below

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------