Dear community.
Our customer has question below. I am sorry that there are so many.
Question1
About 50.7.1 Regulator 1P1 Register (PMU_REG_1P1) of i.MX6DQRM.
1-1 The proper value of Brownout target of bi12 - 8 is not known.
In the case how do I set it?
1-2 The setting value of bit 3 - 0 is not described.
How do I set it?
Also, what affects setting pull down?
Question2
About 50.7.2 Regulator 3P0 Register (PMU_REG_3P0) of i.MX6DQRM.
2-1 · The proper value of Brownout target of bi12 - 8 is not known.
How do I set it?
2-2 The setting value of bit 2 - 0 is not described.
How do I set it?
2-3 When not using USB, how can I set VBUS_SEL?
Should it be OnTheGo rather than a host?
Question 3
About 50.7.3 Regulator 2P5 Register (PMU_REG_2P5) of i.MX6DQRM.
3-1 The proper value of Brownout target of bi12 - 8 is not known.
How do I set it?
3-2 There is no description of the setting value of bit 18, bit 3 - 0.
How do I set it?
Also, what affects setting pull down?
Question 4
About 50.7.4 Digital Regulator Core Register (PMU_REG_CORE)
4-1 Is it possible to limit the current at LDO_ARM, LDO_SOC, LDO_PU startup time?
4-2 How do I set the appropriate voltage for each voltage?
ARM is 792 MHz = min 1.15 V
VPU is 264 MHz = min 1.15 V
(VDD_ARM_CAP) - (VDD SOC) <100 mV
(VDD_ARM_CAP) - (PU_CAP) <100 mV
1.150 - 1.225 = - 0.075 = - 75 mV <100 mV: OK
Question 5 50.7.5 Miscellaneous Register 0 (PMU_MISC0)
5-1 Is it OK if STOP_MODE_CONFIG is set to "1" only, otherwise set to "0"?
Question 6 50.7.6 Miscellaneous Register 1 (PMU_MISC1n)
6-1 There was no description about w1c of bi-31-29
Hou do I set ?
6-2 The setting value of bit 13 - 10 is not described.
How do I set it?
6-3 Bit 9 - 0 relates to CCM, but here is how Should I set it?
Is it necessary to match with the CCM register value?
Question 7 50.7.7 Miscellaneous Control Register (PMU_MISC2n)
7-1 Is Brownout target of bi18 - 16, bit 1 - 0 - 8, bit 2 - 0 correct in ReadOnly?
If setting is necessary, the proper value is not understood. How do I set it?
7-2 For ## _ ENABLE _ ##, bit setting value is not described.
How do I set it?
7-3 Do I have to match CCM settings on the bit 31-30 of VIDEO_DIV, bit 23 of AUDIO_DIV_MSB, bit 15 of
AUDIO_DIV_LSB,bit 7 of PLL3_disable ?
7-4 I do not know the best value of REG # _ STEP_TIME. How do I set it
Thank you,
Best Regards.
Takashi
A1. The bits 12-8 0f the PMU_REG_1P1 register define the target output voltage of the LDO_1P1 regulator. It is recommended to keep unchanged their default value of 0x10 (meaning the target output voltage of 1.1V) as well as the default value of the bits 6-4 that define the target brownout value 175mV lower than the target output voltage (0.925V for the case under consideration).
The bits 3-0 of the PMU_REG_1P1 register should also be kept at their default values. Enabling the pulldown on the regulator's output by setting the ENABLE_PULLDOWN bit allows faster discharge of the 1P1 power rail during the system power off.
A2. The bits 12-8 of the PMU_REG_3P0 register define the target output voltage of the LDO_3P0 regulator. It is recommended to keep unchanged their default value of 0x0F (meaning the target output voltage of 3.0V) as well as the default value of the bits 6-4 that define the target brownout value 175mV lower than the target output voltage (2.825V for the case under consideration).
The bits 2-0 of the PMU_REG_3P0 register should be kept at their default values.
If USB is not used at all, the value of the bit 7 (VBUS_SEL) of the PMU_REG_3P0 register has no matter.
A3. The bits 12-8 0f the PMU_REG_2P5 register define the target output voltage of the LDO_2P5 regulator. It is recommended to keep unchanged their default value of 0x10 (meaning the target output voltage of 2.5V) as well as the default value of the bits 6-4 that define the target brownout value 175mV lower than the target output voltage (2.325V for the case under consideration).
The bits 18 and 3-0 of the PMU_REG_2P5 register should be kept at their default values.
Enabling the pulldown on the regulator's output by setting the ENABLE_PULLDOWN bit allows faster discharge of the 2P5 power rail during the system power off.
A4.
> Is it possible to limit the current at LDO_ARM, LDO_SOC, LDO_PU startup time?
No.
> How do I set the appropriate voltage for each voltage?
For target output voltage settings, please refer to the "Operating Ranges" table of the processor's Data Sheet document.
A5.
> Is it OK if STOP_MODE_CONFIG is set to "1" only, otherwise set to "0"?
It depends on what kind of STOP mode, Deep or Ligh, do you want to put the processor to.
A6.
> There was no description about w1c of bi-31-29 Hou do I set ?
These status bits are set by hardware when the corresponding interrupt condition raises. Write '1' to clear each of these bits, if set.
> The setting value of bit 13 - 10 is not described. How do I set it?
These bits are not related to PMU. They are used to configure the external CLK1_P/N and CLK2_P/N differential clocks as inputs or outputs.
> Bit 9 - 0 relates to CCM, but here is how Should I set it? Is it necessary to match with the CCM register value?
Actually, the PMU_MISC1n register is just the mirrored copy of the CCM_ANALOG_MISC1n register of CCM. So, you can program the CCM_ANALOG_MISC1n register and view the changes in the PMU_MISC1n one and vice versa.
A7.
> Is Brownout target of bi18 - 16, bit 1 - 0 - 8, bit 2 - 0 correct in ReadOnly? If setting is necessary, the proper value is not understood. How do I set it?
Of course, these bits are r/w, not read-only, this is just a typo in the manual. It's better to keep the maximum brownout offset, i.e. set these bits to 0b111.
> For ## _ ENABLE _ ##, bit setting value is not described. How do I set it?
You should set these ##_ENABLE_## bits to 1 to enable the brownout detection feature on the corresponding core domain regulator.
> Do I have to match CCM settings on the bit 31-30 of VIDEO_DIV, bit 23 of
AUDIO_DIV_MSB, bit 15 of AUDIO_DIV_LSB,bit 7 of PLL3_disable ?
The CCM_ANALOG_MISC2n register in CCM is just the mirrored copy of the PMU_MISC2n of PMU. So, all changes are reflected automatically.
> I do not know the best value of REG # _ STEP_TIME. How do I set it
Better to keep them at their default values of 0b00.
Have a great day,
Artur
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