i.MX6DQ behavior when VDDHIGH_IN is not supplied.

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i.MX6DQ behavior when VDDHIGH_IN is not supplied.

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satoshishimoda
Senior Contributor I

Hi community,

Our customer have a question about i.MX6DQ.

Would you let me know the i.MX6DQ behavior if VDDHIGH_IN is not supplied when other powers are supplied.

Toggle PMIC_ON_REQ to reset PMIC? or other action?

Actually, VGEN5 output was toggled when cut off the connection between VGEN5 and VDDHIHG_IN on thier custom board.

(Connection between MMPF0100 and i.MX6DQ is same as SABRE SDP except VGEN5)

They want to know why VGEN5 output was toggled, and I guess it caused by toggling of PMIC_ON_REQ.

Best Regards,

Satoshi Shimoda

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Yuri
NXP TechSupport
NXP TechSupport

Hello,

  Strictly speaking, we can observe unpredictable i.MX6 behavior, when

some power supply voltage is not applied (or when power up sequence

or voltages do not meet specs) : in particular - toggling of PMIC_ON_REQ.

Have a great day,
Yuri

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Yuri
NXP TechSupport
NXP TechSupport

Hello,

  Strictly speaking, we can observe unpredictable i.MX6 behavior, when

some power supply voltage is not applied (or when power up sequence

or voltages do not meet specs) : in particular - toggling of PMIC_ON_REQ.

Have a great day,
Yuri

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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satoshishimoda
Senior Contributor I

Dear Yuri,

You said "unpredictable i.MX6 behavior" about toggling of PMIC_ON_REQ.

So the i.MX6 behavior when some power supply voltage is not applied will be other behavior also?

The toggling of PMIC_ON_REQ is incidental?

Best Regards,

Satoshi Shimoda

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Yuri
NXP TechSupport
NXP TechSupport

Hello,

PMIC_ON_REQ is controlled by the ONOFF pad, SNVS_LP DP_EN and

Power Glitch Detection bits. It can cause assertion and following negation

of PMIC_ON_REQ. 

How to de-assert PMIC_ON_REQ by software. 

Regards,

Yuri.

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satoshishimoda
Senior Contributor I

Dear Yuri,

Thank you for your reply, and sorry for delay.

>PMIC_ON_REQ is controlled by the ONOFF pad, SNVS_LP DP_EN and

> Power Glitch Detection bits.

I think ONOFF = high, and Power Glitch Detection bits is disabled when power-up.

So the PMIC_ON_REQ assertion by VDDHIGH_IN lacking is not controlled behavior by SNVS, right?

Best Regards,

Satoshi Shimoda

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Yuri
NXP TechSupport
NXP TechSupport

Hello,

   Is it possible to look at PMIC_ON_REQ  waveforms ;

what does it mean - toggling ?

Regards,

Yuri.

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