i.MX6DQ LDO output voltage when boot.

cancel
Showing results for 
Search instead for 
Did you mean: 

i.MX6DQ LDO output voltage when boot.

Jump to solution
452 Views
satoshishimoda
Senior Contributor I

Hi community,

I want to confirm about i.MX6DQ PMU.

I understand i.MX6DQ works 792MHz and LDO Enabled mode after iROM code is read when boot sequence, doesn't it?

Then, would you let me know the i.MX6DQ LDO output voltages (VDD_ARM_CAP and VDD_SOC_CAP) after iROM code is read?

According to chapter 50.7.4 in IMX6DQRM (Rev.2), the initial settings for VDD_ARM_CAP and VDD_SOC_CAP seem 1.100V after reset.

But these are not satisfied the operating ranges when 792MHz LDO enabled mode.

So I think the LDO voltages are changed by iROM code.

Best Regards,

Satoshi Shimoda

Labels (2)
Tags (2)
0 Kudos
1 Solution
144 Views
igorpadykov
NXP TechSupport
NXP TechSupport

Hi Satoshi

792MHz =>1.150 V, 396MHz =>0.925 V

Best regards

igor

View solution in original post

0 Kudos
6 Replies
144 Views
igorpadykov
NXP TechSupport
NXP TechSupport

Hi Satoshi

you are right, LDO voltages are changed by iROM code.

When the system boots up, before running to ROM, the default ARM core freq is 24MHz,

and built-in ARM/PU/SOC LDOs are running at LDO-enabled mode, with

VDD_ARM_CAP = VDD_PU_CAP = VDD_SOC_CAP = 1.10V. 

When system goes to ROM, LDOs output voltages would be raised to necessary values

and the ARM core frequency would be raised to 792MHz or 396MHz (depending on the

BT_FREQ Fuse bit setting).

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

144 Views
satoshishimoda
Senior Contributor I

Hi Igor,

Thank you for your reply.

OK, I understood the voltages before running to ROM.

Then, would you let me know the voltage after running to ROM also?

792MHz => xxx [V], 396MHz => yyy [V]

Best Regards,

Satoshi Shimoda

0 Kudos
145 Views
igorpadykov
NXP TechSupport
NXP TechSupport

Hi Satoshi

792MHz =>1.150 V, 396MHz =>0.925 V

Best regards

igor

View solution in original post

0 Kudos
144 Views
satoshishimoda
Senior Contributor I

Hi Igor,

I found the VDD_SOC_CAP voltages (1.10V@24MHz, 0.925V@396MHz) are out of operating range.

These should be 1.15V or higher.

And 1.150V@792MHz is also out of range if VPU frequency is over 264MHz then.

Best Regards,

Satoshi Shimoda

0 Kudos
144 Views
igorpadykov
NXP TechSupport
NXP TechSupport

Hi Satoshi

VDD_SOC_CAP is used for HDMI,PCIE,SATA

they are not used by iROM and modified later.

Best regards

igor

144 Views
satoshishimoda
Senior Contributor I

Hi Igor,

Thank you for your reply.

OK, I understood the VDD_SOC_CAP voltages are no problem even if these are out of operating range on the timing.

Best Regards,

Satoshi Shimoda

0 Kudos