Dear community.
Our customer has question below.
I would like to tell you about eCSPI of iMX6D.
When data larger than the size specified by BURST_LENGTH of ECSPIx_CONREG is transferred in master mode,
SCLK stops once at BURST_LENGTH like the attached image,
Is the length of the period during which this SCLK stops determined by the specification (how many clocks are stopped)
Solved! Go to Solution.
Hi Takashi
period during which SCLK stops is determined by internal module delays
and may be affected by ECSPIx_PERIODREG[SAMPLE_PERIOD] field.
Best regards
igor
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Hi Takashi
period during which SCLK stops is determined by internal module delays
and may be affected by ECSPIx_PERIODREG[SAMPLE_PERIOD] field.
Best regards
igor
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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