i.MX6 solo output BT.656 issue (MCIMX6S5EVM10AB)

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i.MX6 solo output BT.656 issue (MCIMX6S5EVM10AB)

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darrenwang
Contributor I
Hi Qiang Li:
sorry for bother you.
I have a issue same as below case 1,
we use i.mx6 bt.656 (d0~ d7) + CLK output to tw8836 (d0 ~ d7) CLK,
no swap pin.

issue screen:
when we output white line to display , and the line will Flashing.


we want to send 720*480@60hzNTSC(480i) resolution.

The Techwell vendor said , imx6 sent twice EAV , not send SAV + EAV.

(1)Does the driver setting incorrect?

(2)HW how to vertify the waveform by scope?
where can i get the sample waveform for reference?


thank you so much.

darren_wang@compal.com

i.MX6 bt656 display interface

"

1, Using no external HSYNC/VSYNC, just with BT656 itself . iMX6S can not send correct BT656 signal to AK8817
source like bellow"


But here I have a problem about the patch into iMX6S customer board with AK8817 encoder chip.
1, Using no external HSYNC/VSYNC, just with BT656 itself . iMX6S can not send correct BT656 signal to AK8817
source like bellow
//-----------------------------------------------------------------------------------
/driver/video/mxc/mxc_bt656if.c
static struct fb_videomode bt656if_modedb[] = {
    {
     /* NTSC Interlaced output */
     "BT656-NTSC", 60, 720, 480, 37037,
     19, 3,
     20, 3,
     276, 1,
     FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
     FB_VMODE_INTERLACED,
     FB_MODE_IS_DETAILED,},
    ......
    ......
};
//------------------------------------------------------------------------------------
/drivers/mxc/ipu3/ipu_disp.c
/* COUNTER_2: HSYNC for each line */
/* COUNTER_2: HSYNC for each line */
_ipu_di_sync_config(ipu,
        disp,         /* display */
        DI_BT656_SYNC_HSYNC,         /* counter */
        h_total - 1,     /* run count */
        DI_SYNC_CLK,    /* run_resolution */
        0,         /* offset */
        DI_SYNC_NONE,     /* offset resolution */
        0,         /* repeat count */
        DI_SYNC_NONE,     /* CNT_CLR_SEL */
        0,         /* CNT_POLARITY_GEN_EN */
        DI_SYNC_NONE,     /* CNT_POLARITY_CLR_SEL */
        DI_SYNC_NONE,     /* CNT_POLARITY_TRIGGER_SEL */
        0,         /* COUNT UP */
        2*div        /* COUNT DOWN */
        );

/* COUNTER_3: internal VSYNC for each frame */
_ipu_di_sync_config(ipu,
        disp,         /* display */
        DI_BT656_SYNC_IVSYNC,         /* counter */
        v_total - 1,     /* run count */
        DI_BT656_SYNC_HSYNC,    /* run_resolution */
        0,             /* offset */
        DI_SYNC_NONE,     /* offset resolution */
        0,         /* repeat count */
        DI_SYNC_NONE,     /* CNT_CLR_SEL */
        0,         /* CNT_POLARITY_GEN_EN */
        DI_SYNC_NONE,     /* CNT_POLARITY_CLR_SEL */
        DI_SYNC_NONE,     /* CNT_POLARITY_TRIGGER_SEL */
        0,         /* COUNT UP */
       0        /* COUNT DOWN */
        );

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23 Replies

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johnson_jl
Contributor I

Dear LiQiang,

For what you mentioned:

With the 8 bits BT656 interface, for each line of NTSC, we will output (1440 + 276) bytes, and there are total 525 lines for each frame, I don't know what's your meaning of 3432.

By the way, for the blanking video, we havne't output "0x80 0x10 0x80 0x10" for all of them, some blanking video will be filled with all 0x00; that means if you are checking "0x80 0x10" for all blank video, there will be issue.

How can I change 0x00 in blanking video to 0x80 0x10 0x80 0x10?  We faved this issue that our encoder output dark green video between frames(should be blanking).

Johnson

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qiang_li-mpu_se
NXP Employee
NXP Employee

Hi Johnson,

I think you should check the EAV/SAV for blanking video, not the content. It is very diffcult for IPU microcode to generate different blank data "0x80 0x10" for blank video.

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qiang_li-mpu_se
NXP Employee
NXP Employee

Hi Darren, before released this BT656 output patch, we had captured all datas of the BT656 frame, and it was confirmed there are both EAV and SAV data.

You can use logical analyzer to capture all data on the 8 data line to verify it. By the way, can you attach your kernel boot up log here?

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darrenwang
Contributor I

Please refer the log file.

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qiang_li-mpu_se
NXP Employee
NXP Employee

There is no error in the log, please show us the information how did you find "imx6 sent twice EAV , not send SAV + EAV".

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darrenwang
Contributor I

Hi Qiang Li:

Please refer the waveform.

Thank you.

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qiang_li-mpu_se
NXP Employee
NXP Employee

The patch will output data with followed EAV and SAV code:

FF 00 00 B6 ... ... FF 00 00 AB ... ...     (Repeat for 22(19) lines)
FF 00 00 9D ... ... FF 00 00 80 ... ...     (Repeat for 288(240)lines)
FF 00 00 B6 ... ... FF 00 00 AB ... ...     (Repeat for 2(3)lines)
FF 00 00 F1 ... ... FF 00 00 EC ... ...     (Repeat for 23(20)lines)
FF 00 00 DA ... ... FF 00 00 C7 ... ...     (Repeat for 288(240)lines)
FF 00 00 F1 ... ... FF 00 00 EC ... ...     Repeat for 2(3)lines

FF 00 00 B6 ... ... FF 00 00 AB ... ...     (Repeat for 22(19) lines)
FF 00 00 9D ... ... FF 00 00 80 ... ...     (Repeat for 288(240)lines)
FF 00 00 B6 ... ... FF 00 00 AB ... ...     (Repeat for 2(3)lines)
FF 00 00 F1 ... ... FF 00 00 EC ... ...     (Repeat for 23(20)lines)
FF 00 00 DA ... ... FF 00 00 C7 ... ...     (Repeat for 288(240)lines)
FF 00 00 F1 ... ... FF 00 00 EC ... ...     Repeat for 2(3)lines...

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darrenwang
Contributor I

Dear Qiang:

正常horizontal (1440 + 276) * 2 =3432 畫面會正常.

但我們I.MX6 輸出到終端,使用接收端tool 量測卻為6864.

目前只剩這個數值是有差異的,想請問一下在CODE方面有哪些可注意嗎?

thank you.

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qiang_li-mpu_se
NXP Employee
NXP Employee

Hi Darren,

With the 8 bits BT656 interface, for each line of NTSC, we will output (1440 + 276) bytes, and there are total 525 lines for each frame, I don't know what's your meaning of 3432.

By the way, for the blanking video, we havne't output "0x80 0x10 0x80 0x10" for all of them, some blanking video will be filled with all 0x00; that means if you are checking "0x80 0x10" for all blank video, there will be issue.

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tollerhecht
Contributor III

I am out of the office until 22.06.2014.

I will respond to your message when I return.

Note: This is an automated response to your message "Re:

- i.MX6 solo output BT.656 issue (MCIMX6S5EVM10AB)" sent on 06/18/2014

3:34:16 AM.

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darrenwang
Contributor I

Hi Qiang Li:

標準SPEC 設定應該為圖一搭配表一,但我們實際量出來卻為圖(一)與表(二)

想請問參數需要修改哪邊嗎?

圖(一)

表(一)

圖(二)

表(二)

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qiang_li-mpu_se
NXP Employee
NXP Employee

Hi Darren, I can't identify which picture is for 图一,图二,表一,表二. The reference code had only supported the standard 720*480i mode. It can be found as followed:

* hsync_len: EAV Code + Blanking Video + SAV Code (in pixel clock count)

*         For BT656 NTSC, it is 4 + 67*4 + 4 = 276.

*         For BT1120 NTSC, it is 4 + 67*2 + 4 = 142.

*         For BT656 PAL, it is 4 + 70*4 + 4 = 288.

*         For BT1120 PAL, it is 4 + 70*2 + 4 = 148.

*

* vsync_len: not used, set to 1

*/

static struct fb_videomode bt656if_modedb[] = {

{

  /* NTSC Interlaced output */

  "BT656-NTSC", 60, 720, 480, 37037,

  19, 3,

  20, 3,

  276, 1,

  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,

  FB_VMODE_INTERLACED,

  FB_MODE_IS_DETAILED,},

The above 19, 3, 20, 3 are lines as in table of "image003.png".

So "image003.png" and "image004.png" is current NTSC mode output data.

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darrenwang
Contributor I

Dear Qiang:

想請問使用BT.656 port(8 bits data + clk), 為何不能支援到480p , 是哪邊的硬體極限或是其它問題?

thank you.

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qiang_li-mpu_se
NXP Employee
NXP Employee

Hi Darren, the current IPU BT656 microcode is only for interlaced display mode, we haven't implemented the prograssive mode microcode, we think for prograssive mode, it is more easy to use VSYNC/HSYNC mode.

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tollerhecht
Contributor III

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- i.MX6 solo output BT.656 issue (MCIMX6S5EVM10AB)" sent on 06/20/2014

8:27:12 AM.

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tollerhecht
Contributor III

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tollerhecht
Contributor III

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- i.MX6 solo output BT.656 issue (MCIMX6S5EVM10AB)" sent on 06/16/2014

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tollerhecht
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tollerhecht
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- i.MX6 solo output BT.656 issue (MCIMX6S5EVM10AB)" sent on 06/11/2014

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weidong_sun
NXP TechSupport
NXP TechSupport

Hello Darren,

     Would you like to paste connections of CPU-->TW8836 here ? Let me check if hardware connection is correct!

Regards,

Weidong

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