i.MX6: no TVE, how-to setup CCIR656 format on DI0/1 ?

[castel]

Hello,

     About i.MX5 TV-out application, all we can set in bootargs is,

           a. the "YUV444" to format DI

           b. the "TV-PAL/NTSC or others" to determine corresponding framebuffer's resolution & digital blanking

           c. the "tve" to fire TVE driver to work.

     as to i.MX6, we hope to mount a DA sinking from the DI(not MIPI,HDMI,LVDS...) in CCIR656 inferface, to achieve the CVBS-out we need.

     how to do ? we only trace something & set it, but no CCIR656 found on DI0/1 :

          i. mxcfb0:dev=lcd, TV-NTSC, if=YUV444

          ii. we add a named "TV-NTSC" in modedb, refer to the TVE setting in i.MX5

     please help me if any solution.

thanks.

[weidong_sun]

Hello,Kang,

     There is no analog display interfaces on i.mx6 SOC, if you need them like CVBS / RGB or YPbPr, you will have to add and Display IC to convert Digital to analog.

     For Example , you can convert the output of DISP0 with RGB24 parallel signals to Analog RGB/CVBS/YPbPr, recommend you evaluate CH7026 manufactured by Chrontel.

     So : DISP0 on i.MX6 + CH7026 --->RGB out / CVBS or YPbPr.

Regards,

Weidong

[ahamilton]

Hi Weidong,

The CH7026 circuit shown in your reply is almost exactly what I need for a current iMX6 project.  Can you please tell me if the circuit has been built and is operational.  I did a quick scan of the CH7026 datasheet (the one on the Chrontel site, which is not 100% complete) and it seems that the CH7026 should be able to handle 24-bit data from the display port without having to do anything special on the iMX6 side, but if you have any information on any special iMX6 code support required for the CH7206, that would also be helpful.

Thanks,

Alan

[weidong_sun]

Hello,Alan,

       Please send an Email to me , then I will reply you ! or you can directly download it from :

http://www.chrontel.com/index.php/products/display-interface/ch7026-tv-vga-encoder-handhelds-mobile-...

       my address: weidong.sun@freescale.com

Regards,

Weidong

[castel]

Dear Weidong,

     After a trace about the DI/DC setting to output BT.656 at parallel port, it seems to point the "DC Microcode" operation, a DC=>DI mapping/masking to generate any I/F at DISP0/1 you want.

     we began to worry about nothing can be changed by us, we don't know how the DC template define of BT.656 is.

     if we could only choice other IFs defiend in "ipu_disp.c" ?

int _ipu_pixfmt_to_map(uint32_t fmt)

{

    switch (fmt) {

    case IPU_PIX_FMT_GENERIC:

    case IPU_PIX_FMT_RGB24:

        return 0;

    case IPU_PIX_FMT_RGB666:

        return 1;

    case IPU_PIX_FMT_YUV444:

        return 2;

    case IPU_PIX_FMT_RGB565:

        return 3;

    case IPU_PIX_FMT_LVDS666:

        return 4;

    case IPU_PIX_FMT_VYUY:

        return 6;

    case IPU_PIX_FMT_UYVY:

        return 8;

    case IPU_PIX_FMT_YUYV:

        return 10;

    case IPU_PIX_FMT_YVYU:

        return 12;

    case IPU_PIX_FMT_GBR24:

    case IPU_PIX_FMT_VYU444:

        return 13;

    case IPU_PIX_FMT_BGR24:

        return 14;

    }

    return -1;

}

thanks.

[weidong_sun · Accepted solution]

Hello,Kang,

     I confirmed it with BSP team, at present, ipu driver doesn't support BT.656 output.

Regards,

Weidong

[imx5x]

Hi Weidong,

Please go to https://community.freescale.com/docs/DOC-94019

for BT.656 Enable Patch

Although, I still have problem with my BT.656 output, both some one and Freescale said the patch is workable.

Regards,

Ethan Ma

[castel]

Hi Ethan,

     we've tried it but it also fails to us, was the symptom in your side similar as the following we found?

          a. 8 bits data & 27Mhz pixel clock could be measured, but we can't check if the EAV/SAV output correctly or not.

          b. Although the HSYNC/VSYNC isn't required, there is no signal found neither on DI0_PIN2 & PIN4

     have you got more trouble-shooting form Freescale?

thanks.

[imx5x]

Hi Kang Wen,

a. No, you cannot measured EAV/SAV Code by Scope, unless you have special EAV/SAV Anyerlizer. However, I have checked the timing, which you can referance "static struct fb_videomode" in mxc_bt656if.c and mxcfb_adv739x.c. The timing is matched standard EAV and SAV code referance timing, but I'm not sure is the timing will be included into EAV/SAV Code or not.

b. No, the both H-sync and V-sync are not required in BT.656, but you still can measured them by Scope on both DI0_Pin2 (H-Sync) & DI0_Pin3(V-Sync)

As I know Freescale is doing for imx6Q BT.656 Function right now.

May I know which OS are you implementing Android or Linux.

My problem is color space failure on Android OS but I can see whole screen, my result proves iMX6Q EAV/SAV Code is correctly.

One more information for you, I guess the embedded Linux is works fine since it doesn't need to use too munch transparent, You may try it.

I-Shin Ma

[castel]

Dear I-Shin,

     thanks. We use Linux.

     From your description, it seems we loss more something than you, because we haven't seen a screen from the DAC's analog output(you could, it validates the EAV/SAV coding/timing from DI, though the CSC issue is remained.) and H/V-Sync from the corresponding DI pins(you could, though it's not required) yet, the SYNC pin should be pure by IPU but we loss it. We must check the patch is done correctly & come into effect first.

Regards,

Kang

[castel]

thanks so great!  How could me lose the nice patch, even the driver of the same DAC  as we use has been ready from Freescale !

I'll give my result after patching , whether it's workable for me or not.

[castel]

Dear Weidong,

     thanks, we know the i.MX6 has no analog I/F to output video.

     so we did add a DAC "ADV7391" (like the CH7026 you mentioned, but the former is much simpler because it only accepts BT.656, the cheapest TV encoder), a CVBS encoder to convert BT.656 to analog(525i/625i).

     But we don't know how to set DI format to BT.656 though the manual say YES as follow, and we've tried some setup in bootargs(wroten on top) but no effect.