i.MX6 ipu3 + 16-bit asynchronus parallel (system-80) LCD

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i.MX6 ipu3 + 16-bit asynchronus parallel (system-80) LCD

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VinodChaudhary
Contributor I

Does Linux driver support for ipu3 support 16-bit asynchronus parallel (system-80) LCD ?

We have make 16-bit asynchronus parallel (system-80) LCD connected to i.MX6 working, so would you please suggest what kind of changes we have to do ipu3 driver ?

Regards,

Vinod

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Henry_p
NXP Employee
NXP Employee

As far as I know, we've never supported Asynchronous LCD for IPU in Linux BSP. Once I requested to support it for i.MX37 project, but it was not accepted due to resource limitation.

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DJ88
Contributor I

Dear Vinod,

I am also looking for an asynchronous LCD driver for IMX6 board.  I couldn't find any. You got any solution to your query ?

Thanks in advance..:smileyhappy:

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Henry_p
NXP Employee
NXP Employee

As far as I know, we've never supported Asynchronous LCD for IPU in Linux BSP. Once I requested to support it for i.MX37 project, but it was not accepted due to resource limitation.

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austin-
Contributor II

I'm also trying to get a system-80 (a.k.a. 80-system, 8080) LCD interfaced to an i.MX6 without having to create all the drivers, framebuffers and such from scratch.  But I see in section 37.3.1.2.2 - Display Interface, it says,

• A parallel bidirectional bus interface (for asynchronous access) - up to 32-bit data bus.

     • Compatible with MIPI-DBI standard.

     • Control protocol - either system-80 or system-68K The timing and polarity of the

        signals are programmable.

From: i.MX 6Dual/6Quad Applications Processor Reference Manual, Rev. 0, 11/2012, page 2674

The information in section 37.3.1.2.1.2 - Asynchronous Access, seems important to using the DI with a system-80 LCD, but it doesn't provide any concrete steps to take or even where to look for more information or a keyword to use.  It is defiantly talking about system-80\68 interfaces, because I've never seen a more clear description of how the data bus and control registers are shared in a system-80 interface than the one in the i.MX6 RM

The asynchronous access requires the specification of an address. The display interface uses "indirect addressing", namely, there is no address bus, and the address, as well as control and configuration commands, are embedded in the data stream. The access procedure - including writing addresses and commands - is managed autonomously by the interface, in one of two ways:

It is advertised... how do I make use of it?

Thanks,

Austin

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RobertSchwebel
Contributor IV

Vinod,

I don't think that MX6 supports smart displays (which are usually meant for microcontrollers). MX25 and MX27 support these displays.

rsc

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