i.MX6 exact latch timing of BOOT_CFG pins

[torus1000]

Hi,

I would like to know the BOOT_CFG pin latching of i.MX6Q.

Is i.MX6's "BOOT_MODE Pin Latching" basically same as i.MX8?

Please see https://community.nxp.com/message/1013080

>The BOOT_MODE is initialized by sampling the BOOT_MODE0 and BOOT_MODE1 inputs on the rising edge of the POR_B.

Is the BOOT_CFG also initialized by sampling the BOOT_CFG inputs on the rising edge of the POR_B?

Can someone help me?

[igorpadykov · Accepted solution]

Hi torus

>Is i.MX6's "BOOT_MODE Pin Latching" basically same as i.MX8?

yes, i.MX8M processor uses the same SRC module as i.MX6Q so provided

answer is valid for it too.

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

[torus1000]

Dear Igor

Thank you for your reply.  I'm clear now.

BTW I found same questions here:

Boot configuration pins

https://community.nxp.com/thread/470040