i.MX6 and EIM interface to XR16V798

[henfos]

Hi,

I'm trying to integrate the EXAR XR16V798 serial port extender to the i.MX6dl through the EIM bus. It is set up with CS0, DA0-7 and D0-7. However, I'm struggling to understand how it should be set up in the devicetree. Examples I've seen are most on integrating SRAM or similar. Default my EIM bus is set up as this:

weim: weim@021b8000 {
compatible = "fsl,imx6q-weim";
reg = <0x021b8000 0x4000>;
interrupts = <0 14 0x04>;
clocks = <&clks 196>;
};

Does anyone have any information to nudge me in the right direction?

Best regards,

Henrik

[igorpadykov]

Hi Henrik

one can check documentation and example :

linux/Documentation/devicetree/bindings/bus/imx-weim.txt
imx6qdl-sabreauto.dtsi "weim-cs-timing" :
http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/tree/arch/arm/boot/dts/imx6qdl-sabreauto.dts...

Also may be useful Table 40. EIM Internal Module Multiplexing i.MX6SDL Datasheet

http://cache.freescale.com/files/32bit/doc/data_sheet/IMX6SDLCEC.pdf

Best regards
igor
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[henfos]

Hi Igor,

Think I'm on the right track. I'm interfacing with D0:7 and AD0:7 through an 8-bit Motorola 68000 protocol. My registers are now set up as the following:

fsl,weim-cs-timing = <0x02040081 0x00000010 0x1C000000 
                                    0x00000000 0x04000040 0x00000000>;

It's look like I'm now able to read registers (0x08000000->), however since I'm not able to write anything yet, I have no way of telling if I'm reading garbage or actual register values.

I see that the http://www.nxp.com/assets/documents/data/en/application-notes/AN2680.pdf document references that the chip is used with ST16C2552 Dual UART chip, this uses the Intel interface, but is somehow similar. Do you have any examples of the cs-timing for this chip?

Best regards,

Henrik

[igorpadykov]

Hi Henrik

for intel interface one can look imx6qdl-sabreauto.dtsi (sabre ai board has nor flash)

linux-imx.git - i.MX Linux Kernel 

Best regards
igor