i.MX6: What is XBAR? How it works and what kind of structure is it?

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i.MX6: What is XBAR? How it works and what kind of structure is it?

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kenji
Contributor IV

Hi All.

What is XBAR? How it works and what kind of structure is it?

Most peripherals not work without XBAR setting.

I'm working with i.MX RT1062, and I refer these documents.
IMXRT1060RM.pdf
IMXRT1060CEC.pdf
IMXRT1060IEC.pdf

These document are not documented well about XBAR.
So I can't understand well about XBAR.

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mcn
Contributor I
I want to second this

Three years later, the only description of the XBAR in the IMXRT1010 Processor Reference Manual is "This table shows the XBAR resource assignments in the chip." XBAR is not included in the list of acronyms at the beginning of the document.

In the datasheet we find this single reference to the XBAR: Table2, "Each crossbar switch is an array of muxes with shared inputs. Each mux output provides one output of the crossbar. The number of inputs and the number of muxes/outputs are user configurable and registers are provided to select which of the shared inputs are routed to each output"

One answer to the post cites an application note. There we have "This Cross-Trigger Network consists of three Inter-Peripheral Crossbar Switches (XBARs) and two
And-Or-Invert (AOIs). XBAR allows any input (typically from external GPIO or internal module outputs) connected to any output under users’ control. The model allows user configuration of data paths between internal modules and between internal modules and GPIO. AOI supports the signal generation by inverting the signals from AOI inputs. The typical use case of the cross-trigger networking is the motor control.

So, in three oblique references we sort of piece together a little of what this is about. After hunting down a few examples, we start to get some idea of what it is and how and when to use it. But wow, what a waste of time for needless obfuscation.

Is there any document where this and all of the other subsystems in the IMXRT are described with sufficient detail that we can write code based on that description?

In general, I would wish that those who write and supervise these documents be a little more sensitive to our time.
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jamesbone
NXP TechSupport
NXP TechSupport

You can find more documentation in our Reference Manual of the Processor or in the following Application Note  AN12051,

https://www.nxp.com/docs/en/application-note/AN12051.pdf

 

 

 

 

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kenji
Contributor IV

Hi jamesbone-san

Unfortunately, I didn't find the information I wanted to know.

On sample code to to use FlexPWM,  XBARA is setting like below code.

kenji_0-1626764498422.png

I would like to know why it is set this way. In other words, I want to know the input / output relationship for this function. Is there a correspondence table or block diagram?

Looking at this, I don't understand why it is chosen this way.

kenji_1-1626765409733.png

kenji_2-1626765513018.png

 

   

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FelipeGarcia
NXP Employee
NXP Employee

Hi Kenji,

XBAR is a module intended to provide a flexible crossbar switch function that allows any input (typically from external GPIO or internal module outputs) to be connected to any output (typically to external GPIO or internal module inputs) under user control. The need of XBAR when using PWM is because of how the faults pins are internally connected, as you mentioned we do not have this documented in our manual but I recommend you to check this thread.

Solved: How to run PWM on RT1064 EVK ? - NXP Community

Have a great day,

Felipe

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