i.MX6-ULL IOMUX options

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i.MX6-ULL IOMUX options

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Larry5335
Contributor IV

In the schematic for the i.MX6-ULL, the last page has the IO Mux options available for the part, see attached.

Under the heading ALT8, there are 2 entries for UART5 Tx and Rx, namely GPIO1_IO04 and 05 and again listed on CSI_DATA00 and 01.

Is UART5 pinned out to the GPIO pins or the CSI pins or both?

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Larry

yes, pin that is not being used for UART5 can be muxed to a different function,

please look at Figure 33-2. IOMUX Cell Block Diagram i.MX6UL Reference Manual
http://www.nxp.com/docs/en/reference-manual/IMX6ULLRM.pdf

So GPIO1_IO05 pin can be used for GPIO and CSI_DATA01 for UART5 Rx.

Best regards
igor

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Larry

it has both options according to i.MX6UL Reference Manual Chapter 4

External Signals and Pin Multiplexing p.197

http://www.nxp.com/docs/en/reference-manual/IMX6ULLRM.pdf 

Best regards
igor
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Larry5335
Contributor IV

Igor,

I understand the UART5 can be brought out to those pins. But when using ALT8 for the setup, i.e. the chip configuration, is it brought out to both sets of pins at the same time? Or is it either one set of pins OR the other.

Regards,

Larry

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Larry

it is one configuration at time

Best regards
igor

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Larry5335
Contributor IV

Great. Then for ALT8 mode, which pins is UART5 brought out to?

Larry

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Larry

please look at i.MX6ULL Reference Manual sect.4.1.1 Muxing Options p.196 for
Instance "UART5" and corresponding Column "PADS" for ALT8 option
http://www.nxp.com/docs/en/reference-manual/IMX6ULLRM.pdf
may be useful i.MX Pins Tool :
http://www.nxp.com/products/developer-resources/software-development-tools/processor-expert-and-embe...

Best regards
igor

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Larry5335
Contributor IV

Igor,

The Table in chapter 4 of the Ref Man suggests that UART 5 in ALT8 mode is really brought out to multiple pins at the same time, is this really true?

For instance, see the screen shot below, is UART5 Rx really connected to GPIO1_IO05 and CSI_DATA01 in ALT8 mode?

Thanks,

Larry

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Larry

yes UART5 Rx may be muxed to GPIO1_IO05 and CSI_DATA01 pads.

It is responsibility of programmer to program it to one pad and not simultaneously.

Best regards
igor

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Larry5335
Contributor IV

Igor,

So internally, when using ALT8, UART5 is connected to GPIO and CSI pins, it’s up to the pin definition to not bring out the Rx and Tx to 2 pins at the same time.

Can the pin that is not being used for UART5 be muxed to a different function? Say the CSI_DATA01 pin is connected to UART5 Rx. Can the GPIO1_IO05 pin be used for GPIO or if it is enabled, is it also connected to UART5 Rx??

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Larry

yes, pin that is not being used for UART5 can be muxed to a different function,

please look at Figure 33-2. IOMUX Cell Block Diagram i.MX6UL Reference Manual
http://www.nxp.com/docs/en/reference-manual/IMX6ULLRM.pdf

So GPIO1_IO05 pin can be used for GPIO and CSI_DATA01 for UART5 Rx.

Best regards
igor

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