[i.MX6 ULL] General purpose clock output / cannot access I2S1_MCR

[ceggers]

I would like to (mis)use I2S1 MCLK as a general purpose clock output for PLL4 (I don't need any audio feature). I found the following references in IMX6ULLRM.pdf:

• Page 3109, Table 45-1.
  SAI1_MCLK
  Audio Master Clock. The master clock is an input when externally generated and an output when internally generated.
• Page 3111, Figure 45-2.
• Page 3120, I2S memory map
  202_8100 SAI MCLK Control Register (I2S1_MCR)
• Page 3142, SAI MCLK Control Register (I2Sx_MCR)

I tried to write to I2S1_MCR at 0x02028100 using a JTAG debugger in order to set I2S1_MCR.MOE to 1. But the debugger could not access this register due to a bus error. Access to all other I2S1 registers works without any problems.

Question 1: How can output SAI1_MCLK on an external pin?

Question 2: Can I instead use SAI1_RX_BCLK or SAI1_TX_BCLK as a general purpose clock output?

I already considered using CCM_CLKO1/CCM_CLKO2 as a general purpose clock output, but unfortunatley these pins are only available on USDHC1.

regards

Christian

[art · Accepted solution]

To output the SAI1_MCLK signal to an external pin, you first have to select the appropriate IOMUX option for the signal (the possible options are CSI_DATA01 in ALT6 mode and LCD_DATA00 in ALT8 mode, please refer to the Section 4.1.1 "Muxing Options" on the Page 207 of the i.MX6ULL Reference Manual document), then select the signal direction in the IOMUXC_GPR_GPR1 register (please refer to the Section 32.4.2 of the RM), and then set the signal direction in the I2S1_MCR register (refer to the Section 45.4.19 of the RM).

However, using SAI MCLK as the general-purpose clock output seems not to be a good idea. Better is to use CCM_CLKO1/CCM_CLKO2 signals. The possible IOMUX options for them other than uSDHC1 signals are JTAG_TMS in ALT3 mode for CLKO1 and JTAG_TDO in ALT3 mode for CLKO2, please refer to the Section 4.1.1 on the Page 192 of the RM.

Have a great day,
Artur

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[ceggers]

Artur Petukhov schrieb:

To output the SAI1_MCLK signal to an external pin, you first have to select the appropriate IOMUX option for the signal (the possible options are CSI_DATA01 in ALT6 mode and LCD_DATA00 in ALT8 mode, please refer to the Section 4.1.1 "Muxing Options" on the Page 207 of the i.MX6ULL Reference Manual document), then select the signal direction in the IOMUXC_GPR_GPR1 register (please refer to the Section 32.4.2 of the RM), and then set the signal direction in the I2S1_MCR register (refer to the Section 45.4.19 of the RM).

• Muxing options (IOMUX): ok
• Signal direction (IOMUX_GPR1): ok. After setting this, I see the disired clock output at LCD_DATA00
• Signal direction (I2S1_MCR): Not ok. I still cannot access the register because of a bus error.

But that doesn't really matter. I get the clock signal and that's fine.

Artur Petukhov schrieb:

However, using SAI MCLK as the general-purpose clock output seems not to be a good idea. Better is to use CCM_CLKO1/CCM_CLKO2 signals. The possible IOMUX options for them other than uSDHC1 signals are JTAG_TMS in ALT3 mode for CLKO1 and JTAG_TDO in ALT3 mode for CLKO2, please refer to the Section 4.1.1 on the Page 192 of the RM.

Compare to the powerful capabilities of the CCM block, the controller is a little bit short of possible output pins. Both uSDHC1 and JTAG are used in my application. Using peripheral clock output like SAI or LCD looks useful for me in order to get more flexibility.

regards

Christian