i.MX6 SoloX Power On Sequence

[scottgauche]

Hi,

There are a lot of vague hints that VDD_HIGH_IN needs to be powered on before the core voltages of the SoloX (VDD_ARM_IN and VDD_SOC_IN) in data sheets (4.2.1 of the IMXSXCEC.pdf document) and also in the design of the SoloX Sabre Board (using the F6 version of the PMIC).  Yet, it isn't specifically called out.  Does VDD_HIGH_IN need to be powered before the core voltages (VDD_ARM_IN and VDD_SOC_IN)?

Thanks,

Scott

[ScottKerstein]

In the Solo/Dual/Quad, sequencing DCDC_Low and DCDC_High didn't make a difference.  Notice that in the SDQ, VDDSOC_IN and VDDARM_IN are internally connected in the reference manual.    However, see in the PMU block for the SoloX PMU, they have been broken out for separate supplies, but the wording in the paragraphs following looks to be the same as the Solo/Dual/Quad indicating “the number of external supplies is reduced to two.”  But, it's actually four according to the SoloX diagrams. 

Regardless, the SABRE Board connects VDD_ARM_IN and VDD_SOC_IN together using the PF0200F6 PMIC leaving DCD_DDR and DCDC_High to be powered separately.

The question to NXP is the pre-programmed PF0200F6 PMIC required to correctly get the SoloX up and running verses using the none programmed version - PF0200NP in a design?

[igorpadykov · Accepted solution]

Hi Scott

power-up sequence is decribed in sect.4.2.1 Power-Up Sequence

http://cache.freescale.com/files/32bit/doc/data_sheet/IMX6SXCEC.pdf

Also one can use verified on Sabre board sequence with F0200F6 and

VDD_HIGH_IN powered before core voltages. VDD_HIGH powers control logic

of internal ldos, so powering it first allows for more smooth rising of other power

supplies. None programmed version PF0200NP can not be used as it is designed

for further programming for customer needs.

Best regards

igor

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