i.MX6 SSI AC97 multi-channel channel slipping

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i.MX6 SSI AC97 multi-channel channel slipping

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wooosaiiii
Contributor III

Hi guys,

we are developing on i.MX6Q based board with AC97 compatible WM9712 codec. This codec has support for 3 channel output.

We are using mainline based kernel 4.14.134 with fsl_ssi.c driver configured in ac97-slave mode. Without any modifications this driver supports 2 channel stereo configuration but we have modified driver to support all 3 channels and we can play output on all 3 channels.

So far so good... but we are getting a lot of channel slipping when using speaker-test or pulseaudio.

Meaning 1st channel gets played on 2nd channel speaker, 2nd channel output is played on 3rd channel speaker and so on. This is not acceptable in our situation (application requirements). Also there is no indication when this slip is going to happen and is all very sporadic?

So far we tried to backport all patches from the linux-mainline 5.4 related to channels slipping but without any noticeable improvements.

We also tried dual FIFO (dual_fifo) configuration (SDMA channel 22), but this works only for 2 channel configuration. If we use only 2 channels, we don't get any channel slipping, but as soon as we start using all 3 channels we get occasional slip.

Then we also ported dynamic FIFO patches (dyna_fifo) from linux-imx (freescale), but again this works only for single channel or stereo configuration. As soon as we use all three channels we get a channel swap/slip.

We also played with FIFO watermark levels, but this also doesn't bring any improvements so we left this as set by the kernel (watermark = 8 & fifo_depth = 15).

To our understanding this channel slipping is caused by FIFO under/overruns?

Can someone from NXP explain how to avoid FIFO under-runs and channel slipping in 3 channel AC97 slave configuration?

We found some explanation in ERRATA (ERR008990 SSI: Channel swap in single FIFO mode when an under-run or overrun occurs). Is this ERRATA also valid for AC97 mode?

How can we support all 3 output channels reliably?

BR,
Primoz

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wooosaiiii
Contributor III

Hi,

 igorpadykov thanks for your answer.

1)

yes channel slipping may be caused by FIFO under/overruns and

ERRATA also valid for AC97 mode.

OK, thanks for the clarification on ERRATA!

NXP implemented workarounds found in the linux-imx repository are using dual FIFOs (each FIFO gets fed only a single channel information at any given time). But this only works for 2 channels (stereo).

Is there any solution/workaround for multichannel (3 and above) configurations?

2)

Also one can try to tweak NIC301 sdma QoS

described in Table 45-5. QoS and tidemark parameters, sect.45.3.3.1 QoS example

i.MX 6Dual/6Quad Applications Processor Reference Manual

Are there any examples for Linux BSP on how to tweak this?

We are on tight schedule any I don't want to spent too much time researching stuff, thanks?

3) 

As you mentioned QoS and tweaking SDMA...

We tried increasing SDMA priority above standard HIGH (0) to level 7.

Basically we implemented this patch:

Add a 'realtime' DMA priority so we can put DMA priority for ssi over… · ccrome/linux-caleb-dev@a868... 

But this had zero effect on channel slipping issues so we removed it later on.

BR,

Primoz

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Primoz

>Is there any solution/workaround for multichannel (3 and above) configurations?

not sorry

>Are there any examples for Linux BSP on how to tweak this?

no.

In general AC97 for i.MX6Q is not officially supported in NXP BSPs,

one can look at Release Notes on below link what is supported:

i.MX Software and Development Tools | NXP 

NIC priority change examples can also be found in AN4947

https://www.nxp.com/docs/en/application-note/AN4947.pdf 

There are no universal settings, it is specific for each board configuration,

for finding optimal settings may be recommended to try

Commercial Support and Engineering Services | NXP 

Best regards
igor

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igorpadykov
NXP TechSupport
NXP TechSupport

Hi Primoz

yes channel slipping may be caused by FIFO under/overruns and

ERRATA also valid for AC97 mode.

To avoid underruns one can try to decrease processor bus loading from other peripherals,

for example decrease lcd frame rate. Also one can try to tweak NIC301 sdma QoS

described in Table 45-5. QoS and tidemark parameters, sect.45.3.3.1 QoS example

i.MX 6Dual/6Quad Applications Processor Reference Manual

Best regards
igor
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