i.MX6 PCIe with external clock on linux kernel 4.1

[mahi]

Hi Community,

I wondered If someone else has problems with external reference clock for PCIe with linux kernel 4.1.

Somewhere between kernel versions 3.14.52_1 and 4.1.15_1 the "ref_100m" clock was dropped from drivers/pci/host/pci-imx6.c. With internal clock as reference that may work, but with external reference clock it doesn't. The kernel freezes on the first time trying to read a PCIe register.

This issue seems to be addressed in 4.1.15_2 (where "ext_osc", "pcie_ext" and "pcie_ext_src" were introduced), but due to the lack of documentation, I could not find a working devicetree configuration with that kernel.

So I ended up in patching the "ref_100m" clock into the 4.1.15_1 kernel.

Is there any accessible information about the removal of the "ref_100m" and/or the introduction of the new clocks?

Best regards

 Martin

PS: I am working on a custom board with i.MX6DL.

[weidong_sun]

Hello Martin,

   See following, please!

    In order to pass the pcie gen2 compliance tests,

    the external oscillator is mandatory required by

    imx6 legacy platforms.

    add the external osc support by this patch.

    - pll6 should be set bypass mode.

    - src of the pll6_bypass should be lvds_clk1

    - adjust the swing/deemphase value

    - re-configure the phy if the external 100Mhz

    differential osc is used. Because that phy used

    the 125Mhz before.

Attachment is patch!

Best Regards,

Weidong

[mahi]

Hi Weidong,

thanks for the patch. Unfortunately I can't find the correct devicetree configuration according to these instructions.

I added ext_osc = <1>; and the clocks "pcie_ext", "pcie_ext_src" with references to different clocks (IMX6QDL_PLL6_BYPASS, IMX6QDL_PLL6_BYPASS_SRC, IMX6QDL_CLK_LVDS1_IN) in different combinations, but the kernel keeps hanging.

Best regards

 Martin

[maxmar]

Hi Martin,

I'am in the same situation. You've been able to find a valid  divetree configuration for  4.1.15_2 ?

[mahi]

Hi Massimiliano,

sorry for the late reply, but I didn't get an e-mail notification.

Unfortunately I couldn't find the correct configuration, so I kept my first approach with the ref_100m-code copied from the old kernel (see attached patch) and postponed further examinations.

Unexpectedly it works pretty good, but I do not want to keep it that way... So if you find something, it would be great if you post it here...

Best regards

 Martin

[maxmar · Accepted solution]

Hi Martin,

I founded a solution see my post:https://community.nxp.com/message/923849?commentID=923849&et=watches.email.thread 

[mahi]

Hi Massimiliano,

thank you once more for your response... But I'd like to add some information.

In your post i.MX6q PCIe with external clock and SATA, you are using SATA, and i.MX6Q (or D), but with DualLite and without SATA, things differ a little. So I'd like to share my findings with the community:

1. In clk-imx6q.c, imx6dl is missing:

 if ((cpu_is_imx6q() || cpu_is_imx6dl()) && imx_get_soc_revision() == IMX_CHIP_REVISION_2_0
 && (val == 1))
 imx_clk_set_parent(clk[IMX6QDL_PLL6_BYPASS_SRC], clk[IMX6QDL_CLK_LVDS1_IN]);

2. In the device tree, I replaced the REFCLK. At least in i.MX6 DL, PCIe requires the 100MHz SATA refclock (although there is no SATA) :

     clocks = <&clks IMX6QDL_CLK_PCIE_AXI>,
              <&clks IMX6QDL_CLK_LVDS1_IN>,
              <&clks IMX6QDL_CLK_SATA_REF_100M>,
              <&clks IMX6QDL_PLL6_BYPASS>,
              <&clks IMX6QDL_PLL6_BYPASS_SRC>;

Best regards

 Martin

[jiangyaqiang]

HI :

    Is there any document talking about this ? why mx6dl has to use "IMX6QDL_CLK_SATA_REF_100M"?  and why mx6q could not use  "IMX6QDL_CLK_SATA_REF_100M" ?  I have looked into the reference manual several times, but don't find any the setting clue. 

[mahi]

Hi,

"IMX6QDL_CLK_SATA_REF_100M" has to be enabled always - otherwise the kernel freezes during initialization of PCIe.

On most boards with i.MX6Q (or D) this clock is already enabled due to SATA being enabled as well in the device tree.

But with i.MX6DL (or S), there is no SATA, so the clock is not enabled anywhere in the device tree, so I replaced "IMX6QDL_CLK_PCIE_REF_125M" which is not required due to the external reference clock.

I am very sorry that I can't provide any links to documentation, because I couldn't find anything as well. Everything I did was trial-and-error with the information I found in this community and in the sources and patches of kernel and u-boot with their comments.

Best regards

 Martin

[jiangyaqiang]

HI :

I see,thank you very much.

江亚强

软件工程师

Shenzhen Huameishi Technology Co., Ltd

深圳市华美视科技有限公司

深圳市南山区科苑路6号科技园工业大厦东702

Tel：0755-26037882-616

Fax：0775-26037766

Mail:yaqiang.jiang@huameishi.com

[mahi]

Hi Massimiliano,

thank you very much!

Best regards

 Martin