i.MX6 IPU: semantic of BMA IPU microcode operation

[ensc]

Hello,

i.MX6 Reference Manual describes in table 38-25 "DC template's commands description" the N parameter of the BMA instruction as

The N operand defines the N-number of routine's repetitions.

What is "routine" in this context?  E.g. have I to use this operation in a way like

0: HMA(4)
1: HMA1(2)
2: HLG(23)
3: BMA(LF=0, AF=0, N=42, SYNC=0)
4: HLG(STOP=1, 0)       /* noop */

to execute HLG(23) 42 times?    What would be the meaning of the STOP bit in BMA in this case?

Or, have I to write it like

0: HMA(3)
1: HMA1(4)
2: BMA(LF=0, AF=0, N=42, SYNC=0)
3: HLG(STOP=1, 0)
4: HLG(STOP=1, 23)

Is it possible to nest BMA instructions in this case (use LF=0 for outer and LF=1 for inner loop)?  Have I to restore HMA/HMA1 after leaving the internal loop?

[art · Accepted solution]

Q. What is "routine" in this context?

A. In that sense, "routine" is a piece of code in the address range, starting at the lower branch address, stored in the branch address registers with the HMA/HMA1 commands, and ending at the address of the BMA instruction.

Q. have I to use this operation in a way like

0: HMA(4)

1: HMA1(2)

2: HLG(23)

3: BMA(LF=0, AF=0, N=42, SYNC=0)

4: HLG(STOP=1, 0) /* noop */

to execute HLG(23) 42 times?

A. Yes.

Q. What would be the meaning of the STOP bit in BMA in this case?

A. The STOP bit seems to be meaningless in that case.

Q. Is it possible to nest BMA instructions (use LF=0 for outer and LF=1 for inner loop)?

A. Yes, it seems to be possible to manage the nested loops with different counters, managed by the LF bit, with the BMA instructions.

Q. Have I to restore HMA/HMA1 after leaving the internal loop?

A. Yes.

Have a great day,
Artur

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