i.MX6 EIM burst write timing.

cancel
Showing results for 
Search instead for 
Did you mean: 

i.MX6 EIM burst write timing.

Jump to solution
617 Views
satoshishimoda
Senior Contributor I

Hi community,

I have a question about i.MX6 EIM.

Please see chapter 22.8.7 & 22.8.8 in IMX6DQRM (Rev.2).

I can see the burst read memory access timing diagram, but not find burst "write" memory access timing diagram.

Could you send me the burst write memory access timing diagram?

Best Regards,

Satoshi Shimoda

Labels (4)
Tags (1)
0 Kudos
1 Solution
103 Views
igorpadykov
NXP TechSupport
NXP TechSupport

Hi Satoshi

write access is the same as read with one difference: asserted EIM_WE

[EIM_RW] signal. You can refer to Figure 15 "Synchronous Memory, Write Access"

IMX6DQCEC i.MX 6Dual/6Quad Applications Processors for Consumer Products - Data Sheet

Best regards

chip

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

View solution in original post

0 Kudos
1 Reply
104 Views
igorpadykov
NXP TechSupport
NXP TechSupport

Hi Satoshi

write access is the same as read with one difference: asserted EIM_WE

[EIM_RW] signal. You can refer to Figure 15 "Synchronous Memory, Write Access"

IMX6DQCEC i.MX 6Dual/6Quad Applications Processors for Consumer Products - Data Sheet

Best regards

chip

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

View solution in original post

0 Kudos