i.MX6 EIM burst access and WC bit setting.

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i.MX6 EIM burst access and WC bit setting.

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Senior Contributor I

Hi community,

Our partner have a question about i.MX6SDL EIM.

Please see chapter 22.9.1 in IMC6SDLRM (Rev.1).

I want to know what is different between the following two cases.

[Case 1]

WC: 0 (Write access burst length occurs according to BL value)

BL: 100 (Continuous burst length)

SWR: 1 (write accesses are in Synchronous mode)

[Case 2]

WC: 1 (Write access burst length is continuous)

SWR: 1 (write accesses are in Synchronous mode)

Would you let me know what is different and what defines the burst length in each case?

Best Regards,

Satoshi Shimoda

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NXP TechSupport
NXP TechSupport

Generally, there is no difference between these two cases.


Have a great day,
Artur

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65 Views
NXP TechSupport
NXP TechSupport

Generally, there is no difference between these two cases.


Have a great day,
Artur

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

View solution in original post

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64 Views
Senior Contributor I

Hi community,

Would you give me advice?

Best Regards,

Satoshi Shimoda

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