i.MX6 - DDR3L

cancel
Showing results for 
Search instead for 
Did you mean: 

i.MX6 - DDR3L

235 Views
woonthong
Contributor I

 I am using the MVF61NS151CMK50 (IC, MCU, Vybrid, Dual Core A5 & M4, 500MHz). Originally, the design was created with DDR3 (x16), but it has gone EOL. We have moved to the DDR3L, but operating at +1.5V, which should make it DDR3 compliant. We built only a small number of boards when we were using the DDR3, but it seemed to work. When we moved to production with more boards with the DDR3L, a number of boards fail when booting U-Boot, hanging the SOC is trying to communicate with the DD3L.

The connection (and layout) between the processor and DRAM is essentially copied from your tower eval board.

Can you recommend DRAM config settings? And/or suggest how we can dig deeper into this problem?

@mark_middleton

Labels (1)
Tags (1)
0 Kudos
1 Reply

62 Views
TheAdmiral
NXP Employee
NXP Employee

Hi Woon,

I can get working on this when you send me the DDR initialization file.

Cheers,

Mark

0 Kudos