Hi Community,
Our target board does not have USB port. therefore, I am investigating method of DDR stress test tool from U-BOOT.
I have done DDR stress test tool with SABRE AI (i.MX6Q) board to confirm usage of this tool.
I suppose DDR stress test tool is almost working well. But, I found different result from both log files.
When I execute DDR stress test tool from U-BOOT, write leveling calibration worked by fixed setting as following log.
Is it okay? or, my procedures somethings wrong?
<test procedure>
1. Input Enter key to stop boot sequence.
2. Input following command to U-BOOT prompt to invoke tool.
=> dcache off
=> icache off
=> fatload mmc 1:1 0x00907000 ddr-test-uboot-jtag-mx6dq.bin
=> go 0x00907000
<From ddr_calibration_log_by_uboot.log>
Start write leveling calibration...
running Write level HW calibration
Write leveling calibration completed, update the following registers in your initialization script
MMDC_MPWLDECTRL0 ch0 (0x021b080c) = 0x001F001F
MMDC_MPWLDECTRL1 ch0 (0x021b0810) = 0x001F001F
MMDC_MPWLDECTRL0 ch1 (0x021b480c) = 0x001F001F
MMDC_MPWLDECTRL1 ch1 (0x021b4810) = 0x001F001F
Write DQS delay result:
Write DQS0 delay: 31/256 CK
Write DQS1 delay: 31/256 CK
Write DQS2 delay: 31/256 CK
Write DQS3 delay: 31/256 CK
Write DQS4 delay: 31/256 CK
Write DQS5 delay: 31/256 CK
Write DQS6 delay: 31/256 CK
Write DQS7 delay: 31/256 CK
<Regarding attached files>
a) ddr_calibration_20170904-20'28'3.log -> this log file got from GUI tool(DDR_Tester.exe).
b) ddr_calibration_log_by_uboot.log -> this log file got from U-BOOT tool(ddr-test-uboot-jtag-mx6dq.bin).
Best Regards,
Kazuma Sasaki.
Original Attachment has been moved to: ddr_calibration_log_by_uboot.log.zip
Original Attachment has been moved to: ddr_calibration_20170904-20'28'3.log.zip
