i.MX6 : 8bit width DDR3 x 2 design

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i.MX6 : 8bit width DDR3 x 2 design

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norishinozaki
Contributor V

Hello Champs,

i.MX6Q supports 16, 32 and 64 bit data bus access.

Is it possible to use 2 pieces of 8bit DDR3 to make up 16bit data bus?

Please let me know if there is such design.

If you can send me the design diagram, that will be appreciated.

Best regards,

nori Shinozaki

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Yuri
NXP Employee
NXP Employee

  Yes, it is possible to form 16-bit DRAM port, using two chips.

Sorry, such design is not implemented by FSL.
You may send us Your design for checking (via SR).


Have a great day,
Yuri

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Yuri
NXP Employee
NXP Employee

  Yes, it is possible to form 16-bit DRAM port, using two chips.

Sorry, such design is not implemented by FSL.
You may send us Your design for checking (via SR).


Have a great day,
Yuri

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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norishinozaki
Contributor V

Hello Yuri,

Thanks!

I will check.

Regards,

Nori Shinozaki

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