i.MX53 and NHD 4.3 24bit problem

[ToxicAvenger]

Hi,

Im trying to connect NHD-4.3-480272EF-ATXL-T panel to i.MX53 QSB.

Im using Android r10.2 from Adeneo.

I added it to imx53_loco.c board file, as below:

static struct fb_videomode video_modes[] = {

{

/* 272x480 @ 60 Hz , pixel clk @ 9MHz */

"NHD-4.3-480272EF",

/*Vsync cycle:*/ 60,

/*Horizontal display period:*/ 480,

/*Vertical display period:*/ 272,

/*Clock [1/Hz]:*/ 111111,

/*Horizontal back porch:*/ 2,

/*Horizontal front porch:*/ 2,

/*Vertical back porch:*/ 2,

/*Vertical front porch:*/ 2,

/*Horizontal pulse width:*/ 41,

/*Vertical pulse width:*/ 10,

0,

FB_VMODE_NONINTERLACED,

0,},

and changed :

static struct mxc_fb_platform_data fb_data[] = {

{

.interface_pix_fmt = IPU_PIX_FMT_RGB24,

.mode_str = "NHD-4.3-480272EF",

.mode = video_modes,

.num_modes = ARRAY_SIZE(video_modes),

},

{

.interface_pix_fmt = IPU_PIX_FMT_GBR24,

.mode_str = "SXGA",

.mode = video_modes,

.num_modes = ARRAY_SIZE(video_modes),

},

};

I added mxc_ts touch screen module to kernel and changed BoardConfig.mk to use it during calibration.

All is working, touchscreen calibration is good, display is good, except bits per pixel. It have only 16 bits per pixel, but hardware supports 24.

I changed default_bpp in UBOOT /drivers/video/mxc_ipuv3_fb.c, i also tried to change bootargs_android during boot to:

setenv bootargs_android 'setenv bootargs ${bootargs} init=/init androidboot.console=ttymxc0 gpu_nommu,gpu_memory=64M video=mxcdi0fb:RGB24,480x272M@60,bpp=32.

But it didnt worked.

How to enable 24 bit support for this kind of screen?

[weidong_sun]

Hello, Taxic,

    Try like the following,

(1)add new video mode

static struct fb_videomode video_modes[] = {

{

  /* 800x480 @ 57 Hz , pixel clk @ 27MHz */

  "CLAA-WVGA", 57, 800, 480, 37037, 40, 60, 10, 10, 20, 10,

  FB_SYNC_CLK_LAT_FALL,

  FB_VMODE_NONINTERLACED,

  0,},

{

/* 800x480 @ 60 Hz , pixel clk @ 32MHz */

"SEIKO-WVGA", 60, 800, 480, 29850, 89, 164, 23, 10, 10, 10,

FB_SYNC_CLK_LAT_FALL,

FB_VMODE_NONINTERLACED,

0,},

{

/* 1600x1200 @ 60 Hz 162M pixel clk*/

"UXGA", 60, 1600, 1200, 6172,

304, 64,

1, 46,

192, 3,

FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,

FB_VMODE_NONINTERLACED,

0,},

{

/* 272x480 @ 60 Hz , pixel clk @ 9MHz */

"NHD",

/*Vsync cycle:*/ 60,

/*Horizontal display period:*/ 480,

/*Vertical display period:*/ 272,

/*Clock [1/Hz]:*/ 111111,   /*Is it right ? it's unit should be picosencond , check it ,please !*/

/*Horizontal back porch:*/ 2,

/*Horizontal front porch:*/ 2,

/*Vertical back porch:*/ 2,

/*Vertical front porch:*/ 2,

/*Horizontal pulse width:*/ 41,

/*Vertical pulse width:*/ 10,

0,

FB_VMODE_NONINTERLACED,

0,},

};

(2) Connecting New LCD to DI0

static struct mxc_fb_platform_data fb_data[] = {

{

.interface_pix_fmt = IPU_PIX_FMT_RGB24,

  .mode_str = "NHD",

  .mode = video_modes,

  .num_modes = ARRAY_SIZE(video_modes),

  },

{

  .interface_pix_fmt = IPU_PIX_FMT_GBR24,

  .mode_str = "VGA-WXGA+",

  .mode = video_modes,

  .num_modes = ARRAY_SIZE(video_modes),

  },

};

(3)Setting parameters in u-boot environment.

u-boot> setevn bootargs console=ttymxc0 init=/init androidboot.console=ttymxc0 video=mxcdi0fb:RGB24,NHD,bpp=24 di0_primary gpu_memory=64M fbmem=10M pmem=32M,64M

u-boot>run bootcmd

Try to test above code,please !

Regards,

Weidong

[ToxicAvenger]

Hello, thanks for quick replay.

I've tried your solution, but it didn't worked. Screen is always 16bit

Your solution is quite similar to mine. You changed name of the lcd screen form "NHD-4.3-480272EF" to "NHD" and use this variable in uboot. I tried that, but without success.

When i "cat /sys/class/graphics/fb0/bits_per_pixel" im always receiving 16, and on screen i see that pallete is not ok.

From what i know, clock value should be ok. I have used this formula for calculating clock:

1[s] = 1 / 1[Hz] => 1 [picosecond] = 10e6 * 1 / [Mhz].

NHD has 9Mhz frequency, Clock[picosecond] is 10e6 * 1 / 9 = 111111 

Similar for CLAA-WVGA, 27Mhz frequency, Clock[picosecond] is 10e6 * 1 / 27 = 37037,

This formula should be ok. 

Regards,

Toxic

[weidong_sun]

Hello,Toxic ,

    Would you like to share your schematic and LCD datasheet ? If ok , Send it to me : Weidong.sun@freescale.com ,Let me see it .

Regards,

Weidong

[ToxicAvenger]

Hi,

I have sent email with LCD datasheet and screens from device. Did you received it?

Regards,

Toxic

[weidong_sun]

Hello,Toxic,

    I have checked timing of LCD, your settings are correct. But I didn't find the reason why color space is 16bit , not 24bit.

Regards,

Weidong

[ToxicAvenger · Accepted solution]

Hi,

Setting FB_SYNC_CLK_LAT_FALL solves the problem.

Correct, and working configuration for this screen is:

/* 272x480 @ 60 Hz , pixel clk @ 9MHz */

"NHD",

/*Vsync cycle:*/ 60,

/*Horizontal display period:*/ 480,

/*Vertical display period:*/ 272,

/*Clock [1/Hz]:*/ 111111,

/*Horizontal back porch:*/ 2,

/*Horizontal front porch:*/ 2,

/*Vertical back porch:*/ 2,

/*Vertical front porch:*/ 2,

/*Horizontal pulse width:*/ 41,

/*Vertical pulse width:*/ 10,

FB_SYNC_CLK_LAT_FALL ,

FB_VMODE_NONINTERLACED,

0,},

Thank you for help.

Best regards,

Toxic