i.MX53_Accurate Clock output from CCM_SS1_EXT1_CLK pin:

[GopiNagaBharath]

We have interfaced an Audio DAC to i.MX53 controller trough the SSI interface in I2S mode for the audio playback output.

The Audio DAC is from Wolfson WM8523. This particular DAC doesn't have any internal PLL and needs an accurate external Master clock input to produce the accurate Sampling rates for the outputs. The Master Clock for the DAC is produced from "CCM_SS1_EXT1_CLK " pin of Controller.

The Master clock requirements are given below,

We needed the sampling rates of 96KHz, hence we were trying to set the Master clock value to 24.576 MHz. When we have set to this value, we are getting 25 MHz. And then when we try to set to 24 MHz, we are getting  23.59 MHz. Also, I have noticed that the Master clock output value is getting rounder off to 24MHz.

I think that there is an issue with the clock output resolution steps. We are able to get only 25 MHz after 23.59 MHz and not any other value in between.

What clock configurations would be required to achieve the above mentioned required Master Clock on CCM_SS1_EXT1_CLK pin??

[LinWang · Accepted solution]

Hello,

i.Mx53 don't provide precise PLL for Audio application.

An external oscillator is required like i.Mx53 SMD reference design.

BTW,Audio Codec also can be acted as sample clock generator.

[YixingKong]

Gopi

How about your this DI? Had your issue got resolved? If yes, we are going to close the discussion in 3 days. If you still need help please feel free to contact Freescale.

Thanks,
Yixing

[GopiNagaBharath]

Hi,

We couldn't fix this issue on i.mx53 platform (didn't get any response, neither from Freescale email support, nor this forum).

To meet our higher & accurate sampling rate requirements (96KHz & more), we have used hardware PLL module which would provide audio MCLK with variations for different sampling rates.

It is strange why none of the FSL team responded on this till now.

Still no clue about how to achieve the required MCLK to meet the required sampling rates!!

Regards,

Gopi

[YixingKong]

Gopi

We are sorry for getting you back so late, and is branching your question into internal space and assign an application engineer to wok on it.

Regards,

Yixing

[jasonhsu]

Hello

The same problem in i.MX53 is met by me too, does anybody have solution or workaround way ?

[dabrain]

hello,

Did you manage to make it work ? I'm trying to do the same on imx6q and i would like to know how to set the ssi clock in ssi_imx.c. There is no API for that except adding some code.

I would like  to manage 32,44.1,  etc. sample rates