Hello Champs,
My customer is trying to receive data using CSPI in Master mode.
First they tried to use "Poll XCH bit" to read RXFIFO, however the read data is not what they expected.
Then they try to use "wait for TC interrupt", the data is read correctly.
Could you explan why "Poll XCH bit" doesn't work as expected?
The settings are 24bit CLK and 8bit data length, XCH is ON.
Best regards,
Nori Shinozaki
已解决! 转到解答。
Hello Nori Shinozaki,
You may either Poll XCH or wait for the TC interrupt. However, the SPI Exchange Bit (XCH). This bit applies only when the block is configured in Master mode (MODE = 1). Are you using this mode? If so this bit would be cleared automatically when all data in the TXFIFO and the shift register has been shifted out.
Hello Nori Shinozaki,
You may either Poll XCH or wait for the TC interrupt. However, the SPI Exchange Bit (XCH). This bit applies only when the block is configured in Master mode (MODE = 1). Are you using this mode? If so this bit would be cleared automatically when all data in the TXFIFO and the shift register has been shifted out.