i.MX502 CSPI Master: Receive data in polling or interrupt

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 
已解决

i.MX502 CSPI Master: Receive data in polling or interrupt

跳至解决方案
664 次查看
norishinozaki
Contributor V

Hello Champs,

My customer is trying to receive data using CSPI in Master mode.

First they tried to use "Poll XCH bit" to read RXFIFO, however the read data is not what they expected.

Then they try to use "wait for TC interrupt", the data is read correctly.

Could you explan why "Poll XCH bit" doesn't work as expected?

The settings are 24bit CLK and 8bit data length, XCH is ON.

Best regards,

Nori Shinozaki

标签 (1)
0 项奖励
回复
1 解答
577 次查看
gusarambula
NXP TechSupport
NXP TechSupport

Hello Nori Shinozaki,

You may either Poll XCH or wait for the TC interrupt. However, the SPI Exchange Bit (XCH). This bit applies only when the block is configured in Master mode (MODE = 1). Are you using this mode? If so this bit would be cleared automatically when all data in the TXFIFO and the shift register has been shifted out.

在原帖中查看解决方案

0 项奖励
回复
1 回复
578 次查看
gusarambula
NXP TechSupport
NXP TechSupport

Hello Nori Shinozaki,

You may either Poll XCH or wait for the TC interrupt. However, the SPI Exchange Bit (XCH). This bit applies only when the block is configured in Master mode (MODE = 1). Are you using this mode? If so this bit would be cleared automatically when all data in the TXFIFO and the shift register has been shifted out.

0 项奖励
回复