i.MX50: fuse BOOT_CFGx bits addresses

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i.MX50: fuse BOOT_CFGx bits addresses

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norishinozaki
Contributor V

Hello Champs,

I'm looking for an address map of fuse bits of BOOT_CFGx in OCOTP.

However I can't find the addresses of BOOT_CFGx.

Seems like OCOTP_CFGx registers are related to.

For example,  BOOT_CFG1[7:4] equal to OCOTP_CFG1[7:4]?

Best regards,

Nori Shinozaki

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igorpadykov
NXP Employee
NXP Employee

Hi Nori

allocation of fuse bits:

OCOTP_CFG3[15:8] =  BOOT_CFG1[7:0]

OCOTP_CFG3[23:16]  =  BOOT_CFG2[7:0]

OCOTP_CFG3[31:24]  =  BOOT_CFG3[7:0]

you can enter ticket (service request) to obtain more full fuse map.

Best regards

igor

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igorpadykov
NXP Employee
NXP Employee

Hi Nori

allocation of fuse bits:

OCOTP_CFG3[15:8] =  BOOT_CFG1[7:0]

OCOTP_CFG3[23:16]  =  BOOT_CFG2[7:0]

OCOTP_CFG3[31:24]  =  BOOT_CFG3[7:0]

you can enter ticket (service request) to obtain more full fuse map.

Best regards

igor

-----------------------------------------------------------------------------------------------------------------------

Note: If this post answers your question, please click the Correct Answer button. Thank you!

-----------------------------------------------------------------------------------------------------------------------

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norishinozaki
Contributor V

Hello Igor,

Thanks, So the pads used in muxed 16-bit Nand Flash are;

D[0:15] in the Table 6-9 or A[0:15] as the Table 6-23 describes?

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Best regards,

Nori Shinozaki

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igorpadykov
NXP Employee
NXP Employee

Hi Nori

I would suggest to create new thread for

this new question and better understand/formulate

question since "muxed 16-bit Nand Flash " is not right

description.

Thanks

igor

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norishinozaki
Contributor V

Igor,

Thanks!

Ok, this thread was closed.

Best regards,

Nori Shinozaki

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