i.MX353 LPDDR Bus impedance control

[Tony1z]

Hello Sir,

I saw that i.MX Layout application note recommends to control single-ended impedance 50 Ohms on LPDDR bus.

If my PCB stackup and trace width are limited, can I use lower single-ended impedance (45 Ohms for example) on LPDDR bus ?

Is lower single-ended impedance better for LPDDR bus ?

Best regards,

Tony Lin

[JorgeRama_rezRi · Accepted solution]

Hi Tony,

This is the thing: PCB trace impedance has to match the output impedance of the i.MX pins, which is configurable through the DSE bits in the IOMUX registers. So for example, please take a look to table 4-5 of the reference manual. Depending on the DDR type you are using, you have different options of output pin drive strength, so if you choose 45 High drive strength for mobile DDR, the equivalent impedance is 45 Ohms, so your trace in the PCB has to have this impedance. If the impedances match, the power transfer is maximum and you won't have reflexions in your signal, this is done for signal integrity.

Hope this helps!

Best regards.

Jorge.

[Tony1z]

Hi Jorge,

Thanks for your explanation. It helps me.

Best regard,

Tony