i.MX257 how to boot from NAND flash block1 when the NAND flash block0 was failed

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i.MX257 how to boot from NAND flash block1 when the NAND flash block0 was failed

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王剑翰
Contributor III

How to design i.MX257 can boot from Nand flash block1 when the Nand flash block0 was failed? We try to modify forcibly the ECC check value of block0 to illegal by ATK to simulate block0 failed, but the way is not usefull, i.mX257 also boot from Nand flash block0.

Could you help give me some good advice?

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igorpadykov
NXP Employee
NXP Employee

HI 王剑翰

I think you can write only Block1, leaving Block0 empty.

~igor

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igorpadykov
NXP Employee
NXP Employee

HI 王剑翰

one can try to implement procedure described in RM below

MX25 NAND boot.jpg

Best regards

igor

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王剑翰
Contributor III

Hi Igor,

Thank you for your quickly reply.

We also checked this document. As you see,

If ECC Error is detected in first 4 Kbytes of boot data from Block-0, the boot ROM code copies

the duplicated 4k boot data from the NAND flash block-1.

So our engineer try to modify forcibly the ECC check value of block0 to illegal by ATK to simulate block0 failed. But they found i.mX257 also boot from Nand flash block0. Maybe this is not good way to simulate block0 fail.

Couly you have better method to do this?

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igorpadykov
NXP Employee
NXP Employee

HI 王剑翰

one can try to catch waveforms by oscilloscope to verify

that NAND flash block-1 is accessed, then you should see

boot data from block-1 in NFC Buffer Memory, check that with jtag.

~igor

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王剑翰
Contributor III

Hi  igor,

I think you also agree to modify forcibly the ECC check value of block0 to illegal by ATK to simulate block0 failed. Right?

After modifing the ECC check value, we should try to catch waveforms by oscilloscope to verify that NAND flash block-1 is accessed……

If my understanding is wrong, pls help correct me, thank you !

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王剑翰
Contributor III

Hi igor,

Maybe my question is not clear, below is our engineer's question:

We want to do the verification that the iMX257 can load boot code from Block1 of NAND flash automatically when block0 is broken.

So, we have to prepare the test environment to cheat iMX257 that the Block0 of NAND has been broken without breaking hardware Realistically.

Can you lead us the way to achieve this verification?

Look forward to your kindly advice.

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igorpadykov
NXP Employee
NXP Employee

HI 王剑翰

I think you can write only Block1, leaving Block0 empty.

~igor

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王剑翰
Contributor III

Hi Igor,

I’m deeply grateful for all you’ve done.

As we check, we used SLC Nand flash and BT_MLC_SEL was set as 0(i.e. SLC NAND flash).

If so, can i.MX257 also boot from Block-1 when an unrecoverable error is detected within the first 4 Kbytes in block-0?

Look forward to your kindly advice.

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igorpadykov
NXP Employee
NXP Employee

HI 王剑翰

redundancy feature works also for SLC.

~igor

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王剑翰
Contributor III

Hi igor,

We had confirmed it again like below:

We download the u-boot-3ds.bin(183KB)from FSL website.  NAND Flash 1block=128KB.

    a. ATK: flash erase 0x00000000-0x00040000  #both erase the block0&1;

    b. ATK: Program 0x00000000-0x40000  u-boot-3ds.bin

    c. reset and the board boot, customer can confirm the u-boot information output by uart.

    d. ATK: flash erase 0x00000000-0x20000     #erase somewhere in block0;

    e. ATK: Flash erase 0x00020000–0x40000    #erase somewhere in block1;

    f. ATK: Program 0x00020000-0x40000  u-boot-3ds.bin

    g. Reset, but boot failed. also can not check the u-boot information output by uart.

Please help check the above sequence. Is there some wrong sequence in them?

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igorpadykov
NXP Employee
NXP Employee

iROM seeks second block based on boot pins settings

you can check if block size is calculated correctly and try different options:

4K:   block_length = NAND_FLASH_PAGE_SIZE_4K * NAND_FLASH_PAGES_PER_BLOCK_SIZE_4K ;
2K SLC:       block_length = NAND_FLASH_PAGE_SIZE_2K * NAND_FLASH_PAGES_PER_BLOCK_SIZE_SLC_2K
2K MLC:    block_length = NAND_FLASH_PAGE_SIZE_2K * NAND_FLASH_PAGES_PER_BLOCK_SIZE_MLC_2K

you can connect data analyzer on bus and check what address will be issued by ROM when it seeks second block

~igor

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